Module: Mesa Branch: master Commit: b27b0e855078ebb38d0e865a9fe6ec73563d0017 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b27b0e855078ebb38d0e865a9fe6ec73563d0017
Author: Kristian H. Kristensen <[email protected]> Date: Wed Oct 23 16:55:43 2019 -0700 freedreno/registers: Remove duplicate register definitions Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Rob Clark <[email protected]> Signed-off-by: Kristian H. Kristensen <[email protected]> --- src/freedreno/registers/a2xx.xml | 6 ------ src/freedreno/registers/a3xx.xml | 1 - src/freedreno/registers/a4xx.xml | 3 --- src/freedreno/registers/a5xx.xml | 5 ----- src/freedreno/registers/a6xx.xml | 2 +- 5 files changed, 1 insertion(+), 16 deletions(-) diff --git a/src/freedreno/registers/a2xx.xml b/src/freedreno/registers/a2xx.xml index 9b6bf752ab4..88cb3554204 100644 --- a/src/freedreno/registers/a2xx.xml +++ b/src/freedreno/registers/a2xx.xml @@ -1687,12 +1687,6 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> <reg32 offset="0x0a4c" name="MH_PERFCOUNTER1_LOW"/> <reg32 offset="0x0a49" name="MH_PERFCOUNTER0_HI"/> <reg32 offset="0x0a4d" name="MH_PERFCOUNTER1_HI"/> - <reg32 offset="0x0395" name="RBBM_PERFCOUNTER1_SELECT"/> - <reg32 offset="0x0397" name="RBBM_PERFCOUNTER1_LO"/> - <reg32 offset="0x0398" name="RBBM_PERFCOUNTER1_HI"/> - <reg32 offset="0x0445" name="CP_PERFCOUNTER_SELECT"/> - <reg32 offset="0x0446" name="CP_PERFCOUNTER_LO"/> - <reg32 offset="0x0447" name="CP_PERFCOUNTER_HI"/> <reg32 offset="0x0f04" name="RB_PERFCOUNTER0_SELECT"/> <reg32 offset="0x0f08" name="RB_PERFCOUNTER0_LOW"/> <reg32 offset="0x0f09" name="RB_PERFCOUNTER0_HI"/> diff --git a/src/freedreno/registers/a3xx.xml b/src/freedreno/registers/a3xx.xml index bf93b0cb009..93b14e139ff 100644 --- a/src/freedreno/registers/a3xx.xml +++ b/src/freedreno/registers/a3xx.xml @@ -1186,7 +1186,6 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> <reg32 offset="0x2243" name="VFD_INDEX_MAX" type="uint"/> <reg32 offset="0x2244" name="VFD_INSTANCEID_OFFSET" type="uint"/> <reg32 offset="0x2245" name="VFD_INDEX_OFFSET" type="uint"/> - <reg32 offset="0x2245" name="VFD_INDEX_OFFSET" type="uint"/> <array offset="0x2246" name="VFD_FETCH" stride="2" length="16"> <reg32 offset="0x0" name="INSTR_0"> <bitfield name="FETCHSIZE" low="0" high="6" type="uint"/> diff --git a/src/freedreno/registers/a4xx.xml b/src/freedreno/registers/a4xx.xml index 5012e1bd332..0fa914847f3 100644 --- a/src/freedreno/registers/a4xx.xml +++ b/src/freedreno/registers/a4xx.xml @@ -1304,8 +1304,6 @@ perhaps they should be taken with a grain of salt <reg32 offset="0x0113" name="RBBM_PERFCTR_UCHE_7_HI"/> <reg32 offset="0x0114" name="RBBM_PERFCTR_TP_0_LO"/> <reg32 offset="0x0115" name="RBBM_PERFCTR_TP_0_HI"/> - <reg32 offset="0x0114" name="RBBM_PERFCTR_TP_0_LO"/> - <reg32 offset="0x0115" name="RBBM_PERFCTR_TP_0_HI"/> <reg32 offset="0x0116" name="RBBM_PERFCTR_TP_1_LO"/> <reg32 offset="0x0117" name="RBBM_PERFCTR_TP_1_HI"/> <reg32 offset="0x0118" name="RBBM_PERFCTR_TP_2_LO"/> @@ -1435,7 +1433,6 @@ perhaps they should be taken with a grain of salt <reg32 offset="0x0099" name="RBBM_SP_REGFILE_SLEEP_CNTL_0"/> <reg32 offset="0x009a" name="RBBM_SP_REGFILE_SLEEP_CNTL_1"/> - <reg32 offset="0x0168" name="RBBM_PERFCTR_PWR_1_LO"/> <reg32 offset="0x0170" name="RBBM_PERFCTR_CTL"/> <reg32 offset="0x0171" name="RBBM_PERFCTR_LOAD_CMD0"/> <reg32 offset="0x0172" name="RBBM_PERFCTR_LOAD_CMD1"/> diff --git a/src/freedreno/registers/a5xx.xml b/src/freedreno/registers/a5xx.xml index 16b8d2c7bac..42726fcebac 100644 --- a/src/freedreno/registers/a5xx.xml +++ b/src/freedreno/registers/a5xx.xml @@ -1385,10 +1385,6 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> <reg32 offset="0x0468" name="RBBM_PERFCTR_LOAD_CMD3"/> <reg32 offset="0x0469" name="RBBM_PERFCTR_LOAD_VALUE_LO"/> <reg32 offset="0x046a" name="RBBM_PERFCTR_LOAD_VALUE_HI"/> - <reg32 offset="0x046b" name="RBBM_PERFCTR_RBBM_SEL_0"/> - <reg32 offset="0x046c" name="RBBM_PERFCTR_RBBM_SEL_1"/> - <reg32 offset="0x046d" name="RBBM_PERFCTR_RBBM_SEL_2"/> - <reg32 offset="0x046e" name="RBBM_PERFCTR_RBBM_SEL_3"/> <reg32 offset="0x046f" name="RBBM_PERFCTR_GPU_BUSY_MASKED"/> <reg32 offset="0x04ed" name="RBBM_AHB_ERROR"/> <reg32 offset="0x0504" name="RBBM_CFG_DBGBUS_EVENT_LOGIC"/> @@ -1707,7 +1703,6 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> <reg32 offset="0xa892" name="GPMU_PWR_COL_INTER_FRAME_CTRL"/> <reg32 offset="0xa893" name="GPMU_PWR_COL_INTER_FRAME_HYST"/> <reg32 offset="0xa894" name="GPMU_PWR_COL_BINNING_CTRL"/> - <reg32 offset="0xa8a3" name="GPMU_CLOCK_THROTTLE_CTRL"/> <reg32 offset="0xa8c1" name="GPMU_WFI_CONFIG"/> <reg32 offset="0xa8d6" name="GPMU_RBBM_INTR_INFO"/> <reg32 offset="0xa8d8" name="GPMU_CM3_SYSRESET"/> diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml index 480590a85f7..ad3c69d05d1 100644 --- a/src/freedreno/registers/a6xx.xml +++ b/src/freedreno/registers/a6xx.xml @@ -967,7 +967,7 @@ to upconvert to 32b float internally? </enum> <domain name="A6XX" width="32"> - <bitset name="A6XX_RBBM_INT_0_MASK"> + <bitset name="A6XX_RBBM_INT_0_MASK" inline="yes"> <bitfield name="RBBM_GPU_IDLE" pos="0"/> <bitfield name="CP_AHB_ERROR" pos="1"/> <bitfield name="RBBM_ATB_ASYNCFIFO_OVERFLOW" pos="6"/> _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
