Module: Mesa Branch: staging/19.3 Commit: 28cba736ce34127024e675881b9230ef568ddf4b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=28cba736ce34127024e675881b9230ef568ddf4b
Author: Jason Ekstrand <[email protected]> Date: Tue Jan 7 13:20:10 2020 -0600 intel/nir: Add a memory barrier before barrier() Our barrier instruction does not implicitly do a memory fence but the GLSL barrier() intrinsic is supposed to. The easiest back-portable solution is to just add the NIR barriers. We'll sort this out more properly in later commits. Cc: [email protected] Closes: #2138 Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit 803fad43c3f9a89f0d8409bd33280b5457b104c7) --- src/intel/compiler/brw_nir_lower_cs_intrinsics.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c index 434ad005281..3f48a3c5dda 100644 --- a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c +++ b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c @@ -55,6 +55,20 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state, nir_ssa_def *sysval; switch (intrinsic->intrinsic) { + case nir_intrinsic_barrier: { + /* Our HW barrier instruction doesn't do a memory barrier for us but + * the GLSL barrier() intrinsic does for shared memory. Insert a + * shared memory barrier before every barrier(). + */ + b->cursor = nir_before_instr(&intrinsic->instr); + + nir_intrinsic_instr *shared_barrier = + nir_intrinsic_instr_create(b->shader, + nir_intrinsic_memory_barrier_shared); + nir_builder_instr_insert(b, &shared_barrier->instr); + continue; + } + case nir_intrinsic_load_local_invocation_index: case nir_intrinsic_load_local_invocation_id: { /* First time we are using those, so let's calculate them. */ _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
