Module: Mesa Branch: master Commit: 876824908db342f83cebb7845d01b713f85b577a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=876824908db342f83cebb7845d01b713f85b577a
Author: Eric Anholt <[email protected]> Date: Wed Jan 22 10:53:17 2020 -0800 freedreno/ir3: Plumb the ir3_shader_variant into legalize. legalize is computing a lot of state that goes in the variant, let's just store it directly instead of passing pointers around. This leaves max_bary in place, which is doing some surprising work (overwriting the original total_in in some cases). Reviewed-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3494> --- src/freedreno/ir3/ir3.h | 2 +- src/freedreno/ir3/ir3_compiler_nir.c | 2 +- src/freedreno/ir3/ir3_legalize.c | 12 +++++------- 3 files changed, 7 insertions(+), 9 deletions(-) diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h index e777bf440e6..b5135fa4017 100644 --- a/src/freedreno/ir3/ir3.h +++ b/src/freedreno/ir3/ir3.h @@ -1138,7 +1138,7 @@ struct ir3_ra_reg_set * ir3_ra_alloc_reg_set(struct ir3_compiler *compiler); int ir3_ra(struct ir3_shader_variant *v, struct ir3_instruction **precolor, unsigned nprecolor); /* legalize: */ -void ir3_legalize(struct ir3 *ir, bool *has_ssbo, bool *need_pixlod, int *max_bary); +void ir3_legalize(struct ir3 *ir, struct ir3_shader_variant *so, int *max_bary); /* ************************************************************************* */ /* instruction helpers */ diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 656c85e67f1..602b3612165 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -3528,7 +3528,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler, /* We need to do legalize after (for frag shader's) the "bary.f" * offsets (inloc) have been assigned. */ - ir3_legalize(ir, &so->has_ssbo, &so->need_pixlod, &max_bary); + ir3_legalize(ir, so, &max_bary); ir3_debug_print(ir, "AFTER LEGALIZE"); diff --git a/src/freedreno/ir3/ir3_legalize.c b/src/freedreno/ir3/ir3_legalize.c index 1920fcfb93a..7894b75c0e8 100644 --- a/src/freedreno/ir3/ir3_legalize.c +++ b/src/freedreno/ir3/ir3_legalize.c @@ -41,9 +41,8 @@ struct ir3_legalize_ctx { struct ir3_compiler *compiler; + struct ir3_shader_variant *so; gl_shader_stage type; - bool has_ssbo; - bool need_pixlod; int max_bary; }; @@ -252,7 +251,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block) if (is_tex(n) || (n->opc == OPC_META_TEX_PREFETCH)) { regmask_set(&state->needs_sy, n->regs[0]); - ctx->need_pixlod = true; + ctx->so->need_pixlod = true; if (n->opc == OPC_META_TEX_PREFETCH) has_tex_prefetch = true; } else if (n->opc == OPC_RESINFO) { @@ -281,7 +280,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block) } if (is_ssbo(n->opc) || (is_atomic(n->opc) && (n->flags & IR3_INSTR_G))) - ctx->has_ssbo = true; + ctx->so->has_ssbo = true; /* both tex/sfu appear to not always immediately consume * their src register(s): @@ -568,11 +567,12 @@ mark_xvergence_points(struct ir3 *ir) } void -ir3_legalize(struct ir3 *ir, bool *has_ssbo, bool *need_pixlod, int *max_bary) +ir3_legalize(struct ir3 *ir, struct ir3_shader_variant *so, int *max_bary) { struct ir3_legalize_ctx *ctx = rzalloc(ir, struct ir3_legalize_ctx); bool progress; + ctx->so = so; ctx->max_bary = -1; ctx->compiler = ir->compiler; ctx->type = ir->type; @@ -590,8 +590,6 @@ ir3_legalize(struct ir3 *ir, bool *has_ssbo, bool *need_pixlod, int *max_bary) } } while (progress); - *has_ssbo = ctx->has_ssbo; - *need_pixlod = ctx->need_pixlod; *max_bary = ctx->max_bary; do { _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
