Module: Mesa Branch: master Commit: 09295e95eba6f015d1731b589070cf5bbef3d581 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=09295e95eba6f015d1731b589070cf5bbef3d581
Author: Marek Olšák <[email protected]> Date: Tue Mar 10 20:46:16 2020 -0400 radeonsi: tune primitive binning for small chips same as PAL Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143> --- src/gallium/drivers/radeonsi/si_state_binning.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c index aae18f03636..1251b53785b 100644 --- a/src/gallium/drivers/radeonsi/si_state_binning.c +++ b/src/gallium/drivers/radeonsi/si_state_binning.c @@ -485,7 +485,8 @@ void si_emit_dpbb_state(struct si_context *sctx) G_02880C_DEPTH_BEFORE_SHADER(db_shader_control); /* Disable DPBB when it's believed to be inefficient. */ - if (ps_can_kill && + if (sscreen->info.num_render_backends > 4 && + ps_can_kill && db_can_reject_z_trivially && sctx->framebuffer.state.zsbuf && dsa->db_can_write) { @@ -546,8 +547,13 @@ void si_emit_dpbb_state(struct si_context *sctx) /* Tuned for Raven. Vega might need different values. */ if (sscreen->info.has_dedicated_vram) { - context_states_per_bin = 1; - persistent_states_per_bin = 1; + if (sscreen->info.num_render_backends > 4) { + context_states_per_bin = 1; + persistent_states_per_bin = 1; + } else { + context_states_per_bin = 3; + persistent_states_per_bin = 8; + } } else { /* This is a workaround for: * https://bugs.freedesktop.org/show_bug.cgi?id=110214 _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
