Module: Mesa
Branch: master
Commit: 7d9a794f356beb73f08278df06fa1ef5670d012c
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7d9a794f356beb73f08278df06fa1ef5670d012c

Author: Rob Clark <[email protected]>
Date:   Sat Mar 21 09:49:27 2020 -0700

freedreno/a6xx: register update

No functional change, and this register isn't used in userspace.  Just
syncing from envytools tree to eliminate the delta.

Signed-off-by: Rob Clark <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4272>

---

 src/freedreno/registers/a6xx.xml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml
index 1fdc21e9839..967f1382401 100644
--- a/src/freedreno/registers/a6xx.xml
+++ b/src/freedreno/registers/a6xx.xml
@@ -1072,7 +1072,9 @@ to upconvert to 32b float internally?
                <bitfield high="1" low="1" name="CP_AHB_BUSY_CP_MASTER" />
                <bitfield high="0" low="0" name="CP_AHB_BUSY_CX_MASTER"/>
        </reg32>
-       <reg32 offset="0x0213" name="RBBM_STATUS3"/>
+       <reg32 offset="0x0213" name="RBBM_STATUS3">
+               <bitfield pos="24" name="SMMU_STALLED_ON_FAULT" type="boolean"/>
+       </reg32>
        <reg32 offset="0x0215" name="RBBM_VBIF_GX_RESET_STATUS"/>
        <reg32 offset="0x0400" name="RBBM_PERFCTR_CP_0_LO"/>
        <reg32 offset="0x0401" name="RBBM_PERFCTR_CP_0_HI"/>

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