v2: Clarify the relation between num_tiles_pipes and GB_TILE_MODE and the fix
needed for Tahiti as suggested by Marek.
Signed-off-by: Alexandre Demers <alexandre.f.dem...@gmail.com>
---
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 49c310c..73ef051 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -405,8 +405,10 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
&ws->info.num_tile_pipes);
- /* The kernel returns 12 for some cards for an unknown reason.
- * I thought this was supposed to be a power of two.
+ /* "num_tiles_pipes" must be equal to the number of pipes (Px) in
the
+ /* pipe config field of the GB_TILE_MODE array. Only one card
(Tahiti)
+ /* reports a different value (12). Fix it by setting what's in the
+ /* GB_TILE_MODE array (8).
*/
if (ws->gen == DRV_SI && ws->info.num_tile_pipes == 12)
ws->info.num_tile_pipes = 8;
--
2.7.1
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