Haswell GT2 and GT3 have a minimum of 64 entries.  Hardcoding 32
is not legal.

Cc: [email protected]
Signed-off-by: Kenneth Graunke <[email protected]>
---
 src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp 
b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 89b73ca..a89d5d7 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -59,7 +59,7 @@ gen7_blorp_emit_urb_config(struct brw_context *brw)
     * 1.15:0 "VS Number of URB Entries".
     */
    gen7_emit_urb_state(brw,
-                       32 /* num_vs_entries */,
+                       brw->urb.min_vs_entries /* num_vs_entries */,
                        2 /* vs_size */,
                        2 /* vs_start */,
                        0 /* num_hs_entries */,
-- 
2.7.4

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