total instructions in shared programs: 8522159 -> 8505846 (-0.19%)
instructions in affected programs: 746750 -> 730437 (-2.18%)
helped: 3159
total cycles in shared programs: 64374090 -> 64119396 (-0.40%)
cycles in affected programs: 9699070 -> 9444376 (-2.63%)
helped: 2205
HURT: 719
total spills in shared programs: 1707 -> 1688 (-1.11%)
spills in affected programs: 73 -> 54 (-26.03%)
helped: 3
total fills in shared programs: 2647 -> 2619 (-1.06%)
fills in affected programs: 136 -> 108 (-20.59%)
helped: 3
GAINED: 5
LOST: 2
---
src/mesa/drivers/dri/i965/brw_defines.h | 2 ++
src/mesa/drivers/dri/i965/brw_disasm.c | 1 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 14 ++++++++++++--
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 5 +++++
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 1 +
src/mesa/drivers/dri/i965/brw_shader.cpp | 3 +++
6 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index e23f372..fc02ed6 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -980,6 +980,7 @@ enum opcode {
SHADER_OPCODE_TXF_LZ,
SHADER_OPCODE_TXL,
SHADER_OPCODE_TXL_LOGICAL,
+ SHADER_OPCODE_TXL_LZ,
SHADER_OPCODE_TXS,
SHADER_OPCODE_TXS_LOGICAL,
FS_OPCODE_TXB,
@@ -1637,6 +1638,7 @@ enum brw_message_target {
#define GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO 17
#define GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C 18
#define HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE 20
+#define GEN9_SAMPLER_MESSAGE_SAMPLE_LZ 24
#define GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ 26
#define GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W 28
#define GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS 29
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index 046e1b8..4c7fe50 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -550,6 +550,7 @@ static const char *const gen5_sampler_msg_type[] = {
[GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po",
[GEN7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c",
[HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",
+ [GEN9_SAMPLER_MESSAGE_SAMPLE_LZ] = "sample_lz",
[GEN9_SAMPLER_MESSAGE_SAMPLE_LD_LZ] = "ld_lz",
[GEN9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W] = "ld2dms_w",
[GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs",
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index dc2af66..18002c2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -956,6 +956,7 @@ fs_visitor::implied_mrf_writes(fs_inst *inst)
case SHADER_OPCODE_TG4:
case SHADER_OPCODE_TG4_OFFSET:
case SHADER_OPCODE_TXL:
+ case SHADER_OPCODE_TXL_LZ:
case SHADER_OPCODE_TXS:
case SHADER_OPCODE_LOD:
case SHADER_OPCODE_SAMPLEINFO:
@@ -2519,7 +2520,11 @@ fs_visitor::opt_sample_lz()
bool progress = false;
foreach_block_and_inst(block, fs_inst, inst, cfg) {
- if (inst->opcode != SHADER_OPCODE_TXF)
+ if (inst->opcode != SHADER_OPCODE_TXF &&
+ inst->opcode != SHADER_OPCODE_TXL)
+ continue;
+
+ if (inst->shadow_compare)
continue;
/* If the LOD parameter is not sent or is a constant zero then we can
@@ -2528,6 +2533,8 @@ fs_visitor::opt_sample_lz()
int lod_offset;
if (inst->opcode == SHADER_OPCODE_TXF) {
lod_offset = 2;
+ } else if (inst->opcode == SHADER_OPCODE_TXL) {
+ lod_offset = 0;
} else {
unreachable("not reached");
}
@@ -2580,7 +2587,10 @@ fs_visitor::opt_sample_lz()
}
}
- inst->opcode = SHADER_OPCODE_TXF_LZ;
+ if (inst->opcode == SHADER_OPCODE_TXF)
+ inst->opcode = SHADER_OPCODE_TXF_LZ;
+ else if (inst->opcode == SHADER_OPCODE_TXL)
+ inst->opcode = SHADER_OPCODE_TXL_LZ;
progress = true;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 0516d28..a3a3b48 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -792,6 +792,10 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg
dst, struct brw_reg src
msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LOD;
}
break;
+ case SHADER_OPCODE_TXL_LZ:
+ assert(devinfo->gen >= 9);
+ msg_type = GEN9_SAMPLER_MESSAGE_SAMPLE_LZ;
+ break;
case SHADER_OPCODE_TXS:
msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO;
break;
@@ -2125,6 +2129,7 @@ fs_generator::generate_code(const cfg_t *cfg, int
dispatch_width)
case SHADER_OPCODE_TXF_UMS:
case SHADER_OPCODE_TXF_MCS:
case SHADER_OPCODE_TXL:
+ case SHADER_OPCODE_TXL_LZ:
case SHADER_OPCODE_TXS:
case SHADER_OPCODE_LOD:
case SHADER_OPCODE_TG4:
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 557811c..264e9ef 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -217,6 +217,7 @@ schedule_node::set_latency_gen7(bool is_haswell)
case SHADER_OPCODE_TXF:
case SHADER_OPCODE_TXF_LZ:
case SHADER_OPCODE_TXL:
+ case SHADER_OPCODE_TXL_LZ:
/* 18 cycles:
* mov(8) g115<1>F 0F { align1 WE_normal 1Q };
* mov(8) g114<1>F 0F { align1 WE_normal 1Q };
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 69f62d9..b8bc7a2 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -219,6 +219,8 @@ brw_instruction_name(const struct brw_device_info *devinfo,
enum opcode op)
return "txl";
case SHADER_OPCODE_TXL_LOGICAL:
return "txl_logical";
+ case SHADER_OPCODE_TXL_LZ:
+ return "txl_lz";
case SHADER_OPCODE_TXS:
return "txs";
case SHADER_OPCODE_TXS_LOGICAL:
@@ -757,6 +759,7 @@ backend_instruction::is_tex() const
opcode == SHADER_OPCODE_TXF_UMS ||
opcode == SHADER_OPCODE_TXF_MCS ||
opcode == SHADER_OPCODE_TXL ||
+ opcode == SHADER_OPCODE_TXL_LZ ||
opcode == SHADER_OPCODE_TXS ||
opcode == SHADER_OPCODE_LOD ||
opcode == SHADER_OPCODE_TG4 ||
--
2.7.3
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