On Wed, May 25, 2016 at 10:52:31AM -0700, Anuj Phogat wrote: > Experimentation with different values of src/dst horizontal/vertical > alignment showed that these fileds are not used on gen9 hardware. > > A recent update in graphics specs has removed these fields from > XY_FAST_COPY_BLT command. > > Cc: Ben Widawsky <[email protected]> > Cc: Chad Versace <[email protected]> > Signed-off-by: Anuj Phogat <[email protected]>
I verified that the docs were changed (in March actually): Reviewed-by: Ben Widawsky <[email protected]> > --- > src/mesa/drivers/dri/i965/intel_blit.c | 65 > ---------------------------------- > 1 file changed, 65 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/intel_blit.c > b/src/mesa/drivers/dri/i965/intel_blit.c > index 38af598..42cdb36 100644 > --- a/src/mesa/drivers/dri/i965/intel_blit.c > +++ b/src/mesa/drivers/dri/i965/intel_blit.c > @@ -104,64 +104,6 @@ br13_for_cpp(int cpp) > } > } > > -static uint32_t > -get_tr_horizontal_align(uint32_t tr_mode, uint32_t cpp, bool is_src) { > - /* Alignment tables for YF/YS tiled surfaces. */ > - const uint32_t align_2d_yf[] = {64, 64, 32, 32, 16}; > - const uint32_t bpp = cpp * 8; > - const uint32_t shift = is_src ? 17 : 10; > - uint32_t align; > - int i = 0; > - > - if (tr_mode == INTEL_MIPTREE_TRMODE_NONE) > - return 0; > - > - /* Compute array index. */ > - assert (bpp >= 8 && bpp <= 128 && _mesa_is_pow_two(bpp)); > - i = ffs(bpp / 8) - 1; > - > - align = tr_mode == INTEL_MIPTREE_TRMODE_YF ? > - align_2d_yf[i] : > - 4 * align_2d_yf[i]; > - > - assert(_mesa_is_pow_two(align)); > - > - /* XY_FAST_COPY_BLT doesn't support horizontal alignment of 16. */ > - if (align == 16) > - align = 32; > - > - return (ffs(align) - 6) << shift; > -} > - > -static uint32_t > -get_tr_vertical_align(uint32_t tr_mode, uint32_t cpp, bool is_src) { > - /* Vertical alignment tables for YF/YS tiled surfaces. */ > - const unsigned align_2d_yf[] = {64, 32, 32, 16, 16}; > - const uint32_t bpp = cpp * 8; > - const uint32_t shift = is_src ? 15 : 8; > - uint32_t align; > - int i = 0; > - > - if (tr_mode == INTEL_MIPTREE_TRMODE_NONE) > - return 0; > - > - /* Compute array index. */ > - assert (bpp >= 8 && bpp <= 128 && _mesa_is_pow_two(bpp)); > - i = ffs(bpp / 8) - 1; > - > - align = tr_mode == INTEL_MIPTREE_TRMODE_YF ? > - align_2d_yf[i] : > - 4 * align_2d_yf[i]; > - > - assert(_mesa_is_pow_two(align)); > - > - /* XY_FAST_COPY_BLT doesn't support vertical alignments of 16 and 32. */ > - if (align == 16 || align == 32) > - align = 64; > - > - return (ffs(align) - 7) << shift; > -} > - > /** > * Emits the packet for switching the blitter from X to Y tiled or back. > * > @@ -449,13 +391,6 @@ xy_blit_cmd(uint32_t src_tiling, uint32_t src_tr_mode, > > if (src_tiling != I915_TILING_NONE) > SET_TILING_XY_FAST_COPY_BLT(src_tiling, src_tr_mode, XY_FAST_SRC); > - > - CMD |= get_tr_horizontal_align(src_tr_mode, cpp, true /* is_src */); > - CMD |= get_tr_vertical_align(src_tr_mode, cpp, true /* is_src */); > - > - CMD |= get_tr_horizontal_align(dst_tr_mode, cpp, false /* is_src */); > - CMD |= get_tr_vertical_align(dst_tr_mode, cpp, false /* is_src */); > - > } else { > assert(cpp <= 4); > switch (cpp) { > -- > 2.5.5 > _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
