On Fri, May 27, 2016 at 11:12 AM, Christian König <[email protected]> wrote: > Am 27.05.2016 um 00:19 schrieb Marek Olšák: >> >> On Fri, May 27, 2016 at 12:13 AM, Alex Deucher <[email protected]> >> wrote: >>> >>> On Thu, May 26, 2016 at 5:51 PM, Marek Olšák <[email protected]> wrote: >>>> >>>> From: Marek Olšák <[email protected]> >>>> >>>> SDMA submission somehow interacts with the skipping CE preamble logic. >>>> This is a workaround for current kernels which have the bug. >>>> >>>> Sadly, I can't see what's wrong with the kernel driver. The CE preamble >>>> handling there looks good to me. >>>> >>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95545 >>> >>> What exactly is going wrong? Is the kernel not scheduling the >>> preamble or is the ordering wrong or something else? >> >> There are VM faults for addresses that are too far away from memory >> allocated by the process. >> >> It looks like the contents of CE RAM come from a different process, >> which suggests that the CE preamble IB was skipped. >> >> Disabling the CE preamble IB means that the preamble packets are added >> to the main CE IB instead, which makes the problem go away. > > > Just a guess, but does commit 9f8fb5a2b339ba83493991ca8f1173a939a696d3 in > Alex drm-next-4.7 tree helps with the problem? > > commit 9f8fb5a2b339ba83493991ca8f1173a939a696d3 > Author: Christian König <[email protected]> > Date: Fri May 6 14:52:57 2016 +0200 > > drm/amdgpu: move preamble IB handling into common code > > This fixes the handling which was completely broken when you > ad more than one preamble IB.
I'm using amd-staging-4.5, which has that. Apparently it doesn't help. Marek _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
