Fixes the following failures : dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit
Tested on IVB/HSW Signed-off-by: Lionel Landwerlin <[email protected]> Cc: [email protected] --- src/intel/vulkan/gen7_pipeline.c | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index c2a38ac..ed940d0 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan/gen7_pipeline.c @@ -37,8 +37,14 @@ static void gen7_emit_rs_state(struct anv_pipeline *pipeline, const VkPipelineRasterizationStateCreateInfo *rs_info, + const VkPipelineMultisampleStateCreateInfo *ms_info, const struct anv_graphics_pipeline_create_info *extra) { + uint32_t samples = 1; + + if (ms_info) + samples = ms_info->rasterizationSamples; + struct GENX(3DSTATE_SF) sf = { GENX(3DSTATE_SF_header), @@ -56,7 +62,7 @@ gen7_emit_rs_state(struct anv_pipeline *pipeline, /* uint32_t LineEndCapAntialiasingRegionWidth; */ .ScissorRectangleEnable = !(extra && extra->use_rectlist), - /* uint32_t MultisampleRasterizationMode; */ + .MultisampleRasterizationMode = samples > 1 ? MSDISPMODE_PERPIXEL : MSDISPMODE_PERSAMPLE, /* bool LastPixelEnable; */ .TriangleStripListProvokingVertexSelect = 0, @@ -108,7 +114,8 @@ genX(graphics_pipeline_create)( emit_vertex_input(pipeline, pCreateInfo->pVertexInputState, extra); assert(pCreateInfo->pRasterizationState); - gen7_emit_rs_state(pipeline, pCreateInfo->pRasterizationState, extra); + gen7_emit_rs_state(pipeline, pCreateInfo->pRasterizationState, + pCreateInfo->pMultisampleState, extra); emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass); @@ -121,11 +128,7 @@ genX(graphics_pipeline_create)( pCreateInfo->pRasterizationState, extra); emit_3dstate_streamout(pipeline, pCreateInfo->pRasterizationState); - if (pCreateInfo->pMultisampleState && - pCreateInfo->pMultisampleState->rasterizationSamples > 1) - anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO"); - - uint32_t samples = 1; + uint32_t samples = pCreateInfo->pMultisampleState->rasterizationSamples; uint32_t log2_samples = __builtin_ffs(samples) - 1; anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) { @@ -233,6 +236,7 @@ genX(graphics_pipeline_create)( wm.LineAntialiasingRegionWidth = 1; /* 1.0 pixels */ wm.EarlyDepthStencilControl = EDSC_NORMAL; wm.PointRasterizationRule = RASTRULE_UPPER_RIGHT; + wm.MultisampleDispatchMode = MSDISPMODE_PERSAMPLE; } /* Even if no fragments are ever dispatched, the hardware hangs if we @@ -312,6 +316,11 @@ genX(graphics_pipeline_create)( } wm.BarycentricInterpolationMode = wm_prog_data->barycentric_interp_modes; + + wm.MultisampleRasterizationMode = samples > 1 ? + MSRASTMODE_ON_PATTERN : MSRASTMODE_OFF_PIXEL; + wm.MultisampleDispatchMode = wm_prog_data->persample_dispatch ? + MSDISPMODE_PERSAMPLE : MSDISPMODE_PERPIXEL; } } -- 2.8.1 _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
