On Fri, Sep 2, 2016 at 10:37 AM, Ian Romanick <[email protected]> wrote:
> On 09/01/2016 11:15 AM, Ilia Mirkin wrote:
>> On Thu, Sep 1, 2016 at 2:10 PM, Ian Romanick <[email protected]> wrote:
>>> + case ir_intrinsic_atomic_counter_comp_swap: {
>>> opcode = TGSI_OPCODE_ATOMCAS;
>>> param = param->get_next();
>>> val = ((ir_instruction *)param)->as_rvalue();
>>> val->accept(this);
>>> data2 = this->result;
>>> - } else if (!strcmp("__intrinsic_atomic_sub", callee)) {
>>> + break;
>>> + }
>>> + case ir_intrinsic_atomic_sub: {
>>
>> I think you meant ir_intrinsic_atomic_counter_sub, and a similar issue
>> in the commit where you remove it.
>
> D'oh. I only build-tested the final product, so I missed that one. I
> fix that before I push.
Would you mind fixing it up and pushing it to a branch somewhere? Just
want to make sure you fix it in a way that doesn't end up breaking
something else :) [It's not that I don't trust you, but ... this stuff
is tedious and repetitive and it's easy to miss a spot. And you'll
have to do it anyways.]
>
>>> opcode = TGSI_OPCODE_ATOMUADD;
>>> st_src_reg res = get_temp(glsl_type::uvec4_type);
>>> st_dst_reg dstres = st_dst_reg(res);
>>> dstres.writemask = dst.writemask;
>>> emit_asm(ir, TGSI_OPCODE_INEG, dstres, data);
>>> data = res;
>>> - } else {
>>> + break;
>>> + }
>
_______________________________________________
mesa-dev mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
