The restriction that Y-tiled surfaces must have valign == 4 only aplies to render targets but we were applying it universally. This causes problems if R32G32B32_SFLOAT is used because it requires valign == 2; this should be okay because you can't render to that format.
Signed-off-by: Jason Ekstrand <[email protected]> Cc: Chad Versace <[email protected]> --- src/intel/isl/isl_gen7.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c index 02273f8..f3d8428 100644 --- a/src/intel/isl/isl_gen7.c +++ b/src/intel/isl/isl_gen7.c @@ -354,7 +354,8 @@ gen7_choose_valign_el(const struct isl_device *dev, */ if (isl_surf_usage_is_depth(info->usage) || info->samples > 1 || - tiling == ISL_TILING_Y0) { + ((info->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) && + tiling == ISL_TILING_Y0)) { require_valign4 = true; } -- 2.5.0.400.gff86faf _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
