Hi, The attached change just makes the bitfield macro match the register number it is used for. Both actually expand into the same values.
Please apply Thanks! Mathias
From eaf61856ba5e40700a4b562fc38750f66cf7cba1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Mathias=20Fr=C3=B6hlich?= <mathias.froehl...@gmx.net> Date: Fri, 23 Sep 2011 19:43:31 +0200 Subject: [PATCH 1/2] r600g: Use the bitfield define matching the register it is used for. Fix a type that should result in the same code. --- src/gallium/drivers/r600/r600_state.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 03e6958..1aa4105 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -2108,8 +2108,8 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shad 0, 0xFFFFFFFF, shader->bo, RADEON_USAGE_READ); r600_pipe_state_add_reg(rstate, R_028850_SQ_PGM_RESOURCES_PS, - S_028868_NUM_GPRS(rshader->bc.ngpr) | - S_028868_STACK_SIZE(rshader->bc.nstack), + S_028850_NUM_GPRS(rshader->bc.ngpr) | + S_028850_STACK_SIZE(rshader->bc.nstack), 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_028854_SQ_PGM_EXPORTS_PS, -- 1.7.4.4
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