Reviewed-by: Jason Ekstrand <[email protected]> On Sat, Oct 8, 2016 at 1:15 AM, Randy Xu <[email protected]> wrote:
> From: "Xu,Randy" <[email protected]> > > Add the miptree level/slice x/y_offset when count the surface offset > in brw_emit_surface_state. The surface offset has two parts, one is > from mt->offset, which should be 32 aligned in width/height for tiled > buffer; another is from mt->level[current_level].slice[current_slice]. > x/y_offset. > > This fix will solve 12 deqp failure > dEQP-EGL.functional.image.create.gles2_cubemap_negative_*_texture > > Signed-off-by: Xu,Randy <[email protected]> > --- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > index 61a4b94..d727526 100644 > --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > @@ -85,7 +85,8 @@ brw_emit_surface_state(struct brw_context *brw, > unsigned read_domains, unsigned write_domains) > { > const struct surface_state_info ss_info = > surface_state_infos[brw->gen]; > - uint32_t tile_x = 0, tile_y = 0; > + uint32_t tile_x = mt->level[0].slice[0].x_offset; > + uint32_t tile_y = mt->level[0].slice[0].y_offset; > uint32_t offset = mt->offset; > > struct isl_surf surf; > @@ -108,6 +109,7 @@ brw_emit_surface_state(struct brw_context *brw, > */ > assert(brw->has_surface_tile_offset); > assert(view.levels == 1 && view.array_len == 1); > + assert(tile_x == 0 && tile_y == 0); > > offset += intel_miptree_get_tile_offsets(mt, view.base_level, > view.base_array_layer, > -- > 2.7.4 > > _______________________________________________ > mesa-dev mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/mesa-dev >
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