Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com>
---
src/mesa/drivers/dri/i965/brw_wm.c | 4 ++--
src/mesa/drivers/dri/i965/gen6_wm_state.c | 5 +++--
src/mesa/drivers/dri/i965/gen7_wm_state.c | 5 +++--
src/mesa/drivers/dri/i965/gen8_depth_state.c | 4 ++--
4 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c
b/src/mesa/drivers/dri/i965/brw_wm.c
index f782da1..df54fb4 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -529,7 +529,8 @@ brw_wm_populate_key(struct brw_context *brw, struct
brw_wm_prog_key *key)
/* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
- (ctx->Multisample.SampleAlphaToCoverage || ctx->Color.AlphaEnabled);
+ (_mesa_is_alpha_test_enabled(ctx) ||
+ _mesa_is_alpha_to_coverage_enabled(ctx));
/* _NEW_BUFFERS _NEW_MULTISAMPLE */
/* Ignore sample qualifier while computing this flag. */
@@ -549,7 +550,6 @@ brw_wm_populate_key(struct brw_context *brw, struct
brw_wm_prog_key *key)
key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
}
-
/* _NEW_COLOR | _NEW_BUFFERS */
/* Pre-gen6, the hardware alpha test always used each render
* target's alpha to do alpha test, as opposed to render target 0's alpha
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c
b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 711e2fd..28fcc1c 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -253,8 +253,9 @@ upload_wm_state(struct brw_context *brw)
ctx->Color.Blend[0]._UsesDualSrc;
/* _NEW_COLOR, _NEW_MULTISAMPLE */
- const bool kill_enable = prog_data->uses_kill || ctx->Color.AlphaEnabled ||
- ctx->Multisample.SampleAlphaToCoverage ||
+ const bool kill_enable = prog_data->uses_kill ||
+ _mesa_is_alpha_test_enabled(ctx) ||
+ _mesa_is_alpha_to_coverage_enabled(ctx) ||
prog_data->uses_omask;
/* Rendering against the gl-context is always taken into account. */
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 110c02c..7226196 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -72,8 +72,9 @@ upload_wm_state(struct brw_context *brw)
/* _NEW_COLOR, _NEW_MULTISAMPLE */
/* Enable if the pixel shader kernel generates and outputs oMask.
*/
- if (prog_data->uses_kill || ctx->Color.AlphaEnabled ||
- ctx->Multisample.SampleAlphaToCoverage ||
+ if (prog_data->uses_kill ||
+ _mesa_is_alpha_test_enabled(ctx) ||
+ _mesa_is_alpha_to_coverage_enabled(ctx) ||
prog_data->uses_omask) {
dw1 |= GEN7_WM_KILL_ENABLE;
}
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c
b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index 73b2186..8249694 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -304,8 +304,8 @@ pma_fix_enable(const struct brw_context *brw)
const bool kill_pixel =
wm_prog_data->uses_kill ||
wm_prog_data->uses_omask ||
- (_mesa_is_multisample_enabled(ctx) &&
ctx->Multisample.SampleAlphaToCoverage) ||
- ctx->Color.AlphaEnabled;
+ _mesa_is_alpha_test_enabled(ctx) ||
+ _mesa_is_alpha_to_coverage_enabled(ctx);
/* The big formula in CACHE_MODE_1::NP PMA FIX ENABLE. */
return !wm_force_thread_dispatch &&
--
2.5.5
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