Re: [Mesa-dev] [PATCH 1/2] radeonsi: add a debug flag that disables optimized shader variants

[Nicolai Hähnle]

Thanks for this. The series is

Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com>

On 21.11.2016 22:41, Marek Olšák wrote:

From: Marek Olšák <marek.ol...@amd.com>

---
 src/gallium/drivers/radeon/r600_pipe_common.c   | 1 +
 src/gallium/drivers/radeon/r600_pipe_common.h   | 1 +
 src/gallium/drivers/radeonsi/si_state_shaders.c | 5 +++++
 3 files changed, 7 insertions(+)

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c 
b/src/gallium/drivers/radeon/r600_pipe_common.c
index 1a7a712..15e8a12 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -664,20 +664,21 @@ static const struct debug_named_value 
common_debug_options[] = {
        { "gs", DBG_GS, "Print geometry shaders" },
        { "ps", DBG_PS, "Print pixel shaders" },
        { "cs", DBG_CS, "Print compute shaders" },
        { "tcs", DBG_TCS, "Print tessellation control shaders" },
        { "tes", DBG_TES, "Print tessellation evaluation shaders" },
        { "noir", DBG_NO_IR, "Don't print the LLVM IR"},
        { "notgsi", DBG_NO_TGSI, "Don't print the TGSI"},
        { "noasm", DBG_NO_ASM, "Don't print disassembled shaders"},
        { "preoptir", DBG_PREOPT_IR, "Print the LLVM IR before initial 
optimizations" },
        { "checkir", DBG_CHECK_IR, "Enable additional sanity checks on shader 
IR" },
+       { "nooptvariant", DBG_NO_OPT_VARIANT, "Disable compiling optimized shader 
variants." },

        { "testdma", DBG_TEST_DMA, "Invoke SDMA tests and exit." },

        /* features */
        { "nodma", DBG_NO_ASYNC_DMA, "Disable asynchronous DMA" },
        { "nohyperz", DBG_NO_HYPERZ, "Disable Hyper-Z" },
        /* GL uses the word INVALIDATE, gallium uses the word DISCARD */
        { "noinvalrange", DBG_NO_DISCARD_RANGE, "Disable handling of 
INVALIDATE_RANGE map flags" },
        { "no2d", DBG_NO_2D_TILING, "Disable 2D tiling" },
        { "notiling", DBG_NO_TILING, "Disable tiling" },
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h 
b/src/gallium/drivers/radeon/r600_pipe_common.h
index 941fc37..25d40da 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -72,20 +72,21 @@
 #define DBG_GS                 (1 << 7)
 #define DBG_PS                 (1 << 8)
 #define DBG_CS                 (1 << 9)
 #define DBG_TCS                        (1 << 10)
 #define DBG_TES                        (1 << 11)
 #define DBG_NO_IR              (1 << 12)
 #define DBG_NO_TGSI            (1 << 13)
 #define DBG_NO_ASM             (1 << 14)
 #define DBG_PREOPT_IR          (1 << 15)
 #define DBG_CHECK_IR           (1 << 16)
+#define DBG_NO_OPT_VARIANT     (1 << 17)
 /* gaps */
 #define DBG_TEST_DMA           (1 << 20)
 /* Bits 21-31 are reserved for the r600g driver. */
 /* features */
 #define DBG_NO_ASYNC_DMA       (1llu << 32)
 #define DBG_NO_HYPERZ          (1llu << 33)
 #define DBG_NO_DISCARD_RANGE   (1llu << 34)
 #define DBG_NO_2D_TILING       (1llu << 35)
 #define DBG_NO_TILING          (1llu << 36)
 #define DBG_SWITCH_ON_EOP      (1llu << 37)
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index cd4b339..0f5a920 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1114,20 +1114,25 @@ static void si_build_shader_variant(void *job, int 
thread_index)
 /* Select the hw shader variant depending on the current state. */
 static int si_shader_select_with_key(struct si_screen *sscreen,
                                     struct si_shader_ctx_state *state,
                                     struct si_shader_key *key,
                                     int thread_index)
 {
        static const struct si_shader_key zeroed;
        struct si_shader_selector *sel = state->cso;
        struct si_shader *current = state->current;
        struct si_shader *iter, *shader = NULL;
+
+       if (unlikely(sscreen->b.chip_class & DBG_NO_OPT_VARIANT)) {
+               memset(&key->opt, 0, sizeof(key->opt));
+       }
+
 again:
        /* Check if we don't need to change anything.
         * This path is also used for most shaders that don't need multiple
         * variants, it will cost just a computation of the key and this
         * test. */
        if (likely(current &&
                   memcmp(&current->key, key, sizeof(*key)) == 0 &&
                   (!current->is_optimized ||
                    util_queue_fence_is_signalled(&current->optimized_ready))))
                return 0;

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