For the series:
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
It was a matter of time that this would resurface again. We used to
have this, but some people didn't want it and removed it.
I wonder if radeonsi implements output indirect indexing exactly like
temps, or if there are differences.
Marek
On Tue, Nov 29, 2016 at 12:01 PM, Nicolai Hähnle <nhaeh...@gmail.com> wrote:
> From: Nicolai Hähnle <nicolai.haeh...@amd.com>
>
> ---
> src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> index 8a247ea..7720edf 100644
> --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> @@ -6438,21 +6438,22 @@ get_mesa_program_tgsi(struct gl_context *ctx,
>
> v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
>
> PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
> v->have_fma = pscreen->get_shader_param(pscreen, ptarget,
>
> PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED);
>
> _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
> prog->Parameters);
>
> /* Remove reads from output registers. */
> - lower_output_reads(shader->Stage, shader->ir);
> + if (!pscreen->get_param(pscreen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS))
> + lower_output_reads(shader->Stage, shader->ir);
>
> /* Emit intermediate IR for main(). */
> visit_exec_list(shader->ir, v);
>
> #if 0
> /* Print out some information (for debugging purposes) used by the
> * optimization passes. */
> {
> int i;
> int *first_writes = rzalloc_array(v->mem_ctx, int, v->next_temp);
> --
> 2.7.4
>
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