[Mesa-dev] [PATCH 1/2] radeonsi: only set VS_OUT_MISC_SIDE_BUS_ENA when the misc vector is used

[Nicolai Hähnle]

From: Nicolai Hähnle <nicolai.haeh...@amd.com>

Should have no effect (other than perhaps on power consumption), but
Vulkan does this.
---
 src/gallium/drivers/radeonsi/si_state.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index 984540d..d86b99f 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -662,40 +662,41 @@ static void si_emit_clip_regs(struct si_context *sctx, 
struct r600_atom *atom)
        struct si_shader *vs = si_get_vs_state(sctx);
        struct tgsi_shader_info *info = si_get_vs_info(sctx);
        struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
        unsigned window_space =
           info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
        unsigned clipdist_mask =
                info->writes_clipvertex ? SIX_BITS : info->clipdist_writemask;
        unsigned ucp_mask = clipdist_mask ? 0 : rs->clip_plane_enable & 
SIX_BITS;
        unsigned culldist_mask = info->culldist_writemask << 
info->num_written_clipdistance;
        unsigned total_mask;
+       bool misc_vec_ena;
 
        if (vs->key.opt.hw_vs.clip_disable) {
                assert(!info->culldist_writemask);
                clipdist_mask = 0;
                culldist_mask = 0;
        }
        total_mask = clipdist_mask | culldist_mask;
 
+       misc_vec_ena = info->writes_psize || info->writes_edgeflag ||
+                      info->writes_layer || info->writes_viewport_index;
+
        radeon_set_context_reg(cs, R_02881C_PA_CL_VS_OUT_CNTL,
                S_02881C_USE_VTX_POINT_SIZE(info->writes_psize) |
                S_02881C_USE_VTX_EDGE_FLAG(info->writes_edgeflag) |
                S_02881C_USE_VTX_RENDER_TARGET_INDX(info->writes_layer) |
                S_02881C_USE_VTX_VIEWPORT_INDX(info->writes_viewport_index) |
                S_02881C_VS_OUT_CCDIST0_VEC_ENA((total_mask & 0x0F) != 0) |
                S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xF0) != 0) |
-               S_02881C_VS_OUT_MISC_VEC_ENA(info->writes_psize ||
-                                           info->writes_edgeflag ||
-                                           info->writes_layer ||
-                                            info->writes_viewport_index) |
-               S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(1) |
+               S_02881C_VS_OUT_MISC_VEC_ENA(misc_vec_ena) |
+               S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(misc_vec_ena) |
                (rs->clip_plane_enable &
                 clipdist_mask) | (culldist_mask << 8));
        radeon_set_context_reg(cs, R_028810_PA_CL_CLIP_CNTL,
                rs->pa_cl_clip_cntl |
                ucp_mask |
                S_028810_CLIP_DISABLE(window_space));
 
        /* reuse needs to be set off if we write oViewport */
        radeon_set_context_reg(cs, R_028AB4_VGT_REUSE_OFF,
                               S_028AB4_REUSE_OFF(info->writes_viewport_index));
-- 
2.7.4

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