On Tuesday, January 3, 2017 11:42:50 AM PST Iago Toral Quiroga wrote: > Enabling GL 4.0 in gen7 requires a bit of work because some hardware and > kernel > combinations may not support all the features. Specifically, we need to know > if the kernel can do pipelined register writes. Unfortunately, this requires > that we emit batches at screen creation time when we don't have a brw_context > available (all our current batch emission infrastructure relies on this). > See [1] and [2] for more details. > > This little series implements the minimum infrastructure necessary so we can > emit a batch to check for register writes at screen creation time. > > The first 4 patches refactor some of the interl_batchbuffer code so they don't > require a brw_context parameter. This way we can reuse the code directly at > screen creation time.
Patches 1-4 are: Reviewed-by: Kenneth Graunke <kenn...@whitecape.org> Regardless of what we decide to do, I think they're a nice cleanup, and we may as well land them.
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