From: Marek Olšák <[email protected]>
the mutex lock is inside util_range_add.
---
src/gallium/drivers/radeonsi/si_cp_dma.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c
b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 06e4899..582e599 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -308,25 +308,27 @@ void si_copy_buffer(struct si_context *sctx,
uint64_t main_dst_offset, main_src_offset;
unsigned skipped_size = 0;
unsigned realign_size = 0;
unsigned tc_l2_flag = get_tc_l2_flag(sctx, R600_COHERENCY_SHADER);
unsigned flush_flags = get_flush_flags(sctx, R600_COHERENCY_SHADER);
bool is_first = true;
if (!size)
return;
- /* Mark the buffer range of destination as valid (initialized),
- * so that transfer_map knows it should wait for the GPU when mapping
- * that range. */
- util_range_add(&r600_resource(dst)->valid_buffer_range, dst_offset,
- dst_offset + size);
+ if (dst != src || dst_offset != src_offset) {
+ /* Mark the buffer range of destination as valid (initialized),
+ * so that transfer_map knows it should wait for the GPU when
mapping
+ * that range. */
+ util_range_add(&r600_resource(dst)->valid_buffer_range,
dst_offset,
+ dst_offset + size);
+ }
dst_offset += r600_resource(dst)->gpu_address;
src_offset += r600_resource(src)->gpu_address;
/* The workarounds aren't needed on Fiji and beyond. */
if (sctx->b.family <= CHIP_CARRIZO ||
sctx->b.family == CHIP_STONEY) {
/* If the size is not aligned, we must add a dummy copy at the
end
* just to align the internal counter. Otherwise, the DMA engine
* would slow down by an order of magnitude for following
copies.
--
2.7.4
_______________________________________________
mesa-dev mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
