From: Marek Olšák <marek.ol...@amd.com>

not needed with the shader fallback
---
 src/gallium/drivers/radeonsi/si_descriptors.c | 22 ----------------------
 src/gallium/drivers/radeonsi/si_state.c       |  9 ---------
 src/gallium/drivers/radeonsi/si_state.h       |  5 -----
 3 files changed, 36 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c 
b/src/gallium/drivers/radeonsi/si_descriptors.c
index 3c98176..59022ed 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -947,21 +947,20 @@ bool si_upload_vertex_buffer_descriptors(struct 
si_context *sctx)
 {
        struct si_vertex_element *velems = sctx->vertex_elements;
        struct si_descriptors *desc = &sctx->vertex_buffers;
        unsigned i, count = velems->count;
        uint64_t va;
        uint32_t *ptr;
 
        if (!sctx->vertex_buffers_dirty || !count || !velems)
                return true;
 
-       unsigned fix_size3 = velems->fix_size3;
        unsigned first_vb_use_mask = velems->first_vb_use_mask;
 
        /* Vertex buffer descriptors are the only ones which are uploaded
         * directly through a staging buffer and don't go through
         * the fine-grained upload path.
         */
        u_upload_alloc(sctx->b.b.stream_uploader, 0,
                       velems->desc_list_byte_size, 256,
                       &desc->buffer_offset,
                       (struct pipe_resource**)&desc->buffer, (void**)&ptr);
@@ -996,42 +995,21 @@ bool si_upload_vertex_buffer_descriptors(struct 
si_context *sctx)
                desc[0] = va;
                desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) |
                          S_008F04_STRIDE(vb->stride);
 
                if (sctx->b.chip_class <= CIK && vb->stride) {
                        /* Round up by rounding down and adding 1 */
                        desc[2] = (vb->buffer->width0 - offset -
                                   velems->format_size[i]) /
                                  vb->stride + 1;
                } else {
-                       uint32_t size3;
-
                        desc[2] = vb->buffer->width0 - offset;
-
-                       /* For attributes of size 3 with byte or short
-                        * components, we use a 4-component data format.
-                        *
-                        * As a consequence, we have to round the buffer size
-                        * up so that the hardware sees four components as
-                        * being inside the buffer if and only if the first
-                        * three components are in the buffer.
-                        *
-                        * Since the offset and stride are guaranteed to be
-                        * 4-byte aligned, this alignment will never cross the
-                        * winsys buffer boundary.
-                        */
-                       size3 = (fix_size3 >> (2 * i)) & 3;
-                       if (vb->stride && size3) {
-                               assert(offset % 4 == 0 && vb->stride % 4 == 0);
-                               assert(size3 <= 2);
-                               desc[2] = align(desc[2], size3 * 2);
-                       }
                }
 
                desc[3] = velems->rsrc_word3[i];
 
                if (first_vb_use_mask & (1 << i)) {
                        radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
                                              (struct r600_resource*)vb->buffer,
                                              RADEON_USAGE_READ, 
RADEON_PRIO_VERTEX_BUFFER);
                }
        }
diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index 024de8b..f53f8dd 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3474,29 +3474,20 @@ static void *si_create_vertex_elements(struct 
pipe_context *ctx,
                                        v->fix_fetch[i] = SI_FIX_FETCH_RGB_16;
                        }
                }
 
                v->rsrc_word3[i] = 
S_008F0C_DST_SEL_X(si_map_swizzle(swizzle[0])) |
                                   
S_008F0C_DST_SEL_Y(si_map_swizzle(swizzle[1])) |
                                   
S_008F0C_DST_SEL_Z(si_map_swizzle(swizzle[2])) |
                                   
S_008F0C_DST_SEL_W(si_map_swizzle(swizzle[3])) |
                                   S_008F0C_NUM_FORMAT(num_format) |
                                   S_008F0C_DATA_FORMAT(data_format);
-
-               /* We work around the fact that 8_8_8 and 16_16_16 data formats
-                * do not exist by using the corresponding 4-component formats.
-                * This requires a fixup of the descriptor for bounds checks.
-                */
-               if (desc->block.bits == 3 * 8 ||
-                   desc->block.bits == 3 * 16) {
-                       v->fix_size3 |= (desc->block.bits / 24) << (2 * i);
-               }
        }
        memcpy(v->elements, elements, sizeof(struct pipe_vertex_element) * 
count);
 
        return v;
 }
 
 static void si_bind_vertex_elements(struct pipe_context *ctx, void *state)
 {
        struct si_context *sctx = (struct si_context *)ctx;
        struct si_vertex_element *v = (struct si_vertex_element*)state;
diff --git a/src/gallium/drivers/radeonsi/si_state.h 
b/src/gallium/drivers/radeonsi/si_state.h
index cd44ed1..f572d2f 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -96,26 +96,21 @@ struct si_stencil_ref {
        struct si_dsa_stencil_ref_part  dsa_part;
 };
 
 struct si_vertex_element
 {
        unsigned                        count;
        unsigned                        first_vb_use_mask;
        /* Vertex buffer descriptor list size aligned for optimal prefetch. */
        unsigned                        desc_list_byte_size;
 
-       /* Two bits per attribute indicating the size of each vector component
-        * in bytes if the size 3-workaround must be applied.
-        */
-       uint32_t                        fix_size3;
        uint8_t                         fix_fetch[SI_MAX_ATTRIBS];
-
        uint32_t                        rsrc_word3[SI_MAX_ATTRIBS];
        uint32_t                        format_size[SI_MAX_ATTRIBS];
        struct pipe_vertex_element      elements[SI_MAX_ATTRIBS];
 };
 
 union si_state {
        struct {
                struct si_state_blend           *blend;
                struct si_state_rasterizer      *rasterizer;
                struct si_state_dsa             *dsa;
-- 
2.7.4

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