On Tue, Mar 7, 2017 at 4:34 PM, Brian Paul <[email protected]> wrote: > Is the sampled level _always_ zero or is it effected by > pipe_sampler_view::u.tex.first_level?
It's affected by pipe_sampler_view::u.tex.first_level. It's the same as putting 0 in similar texture instructions. > > Either way, can you clarify that in the docs? Sure. Marek > > -Brian > > > On Tue, Mar 7, 2017 at 5:32 AM, Marek Olšák <[email protected]> wrote: >> >> From: Marek Olšák <[email protected]> >> >> for better code generation in radeonsi >> --- >> src/gallium/auxiliary/tgsi/tgsi_info.c | 5 +++-- >> src/gallium/auxiliary/tgsi/tgsi_scan.c | 2 ++ >> src/gallium/docs/source/tgsi.rst | 24 ++++++++++++++++++++++++ >> src/gallium/include/pipe/p_shader_tokens.h | 4 ++-- >> 4 files changed, 31 insertions(+), 4 deletions(-) >> >> diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c >> b/src/gallium/auxiliary/tgsi/tgsi_info.c >> index f8bedee..42521d7 100644 >> --- a/src/gallium/auxiliary/tgsi/tgsi_info.c >> +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c >> @@ -47,29 +47,29 @@ static const struct tgsi_opcode_info >> opcode_info[TGSI_OPCODE_LAST] = >> { 1, 2, 0, 0, 0, 0, 0, COMP, "MUL", TGSI_OPCODE_MUL }, >> { 1, 2, 0, 0, 0, 0, 0, COMP, "ADD", TGSI_OPCODE_ADD }, >> { 1, 2, 0, 0, 0, 0, 0, REPL, "DP3", TGSI_OPCODE_DP3 }, >> { 1, 2, 0, 0, 0, 0, 0, REPL, "DP4", TGSI_OPCODE_DP4 }, >> { 1, 2, 0, 0, 0, 0, 0, CHAN, "DST", TGSI_OPCODE_DST }, >> { 1, 2, 0, 0, 0, 0, 0, COMP, "MIN", TGSI_OPCODE_MIN }, >> { 1, 2, 0, 0, 0, 0, 0, COMP, "MAX", TGSI_OPCODE_MAX }, >> { 1, 2, 0, 0, 0, 0, 0, COMP, "SLT", TGSI_OPCODE_SLT }, >> { 1, 2, 0, 0, 0, 0, 0, COMP, "SGE", TGSI_OPCODE_SGE }, >> { 1, 3, 0, 0, 0, 0, 0, COMP, "MAD", TGSI_OPCODE_MAD }, >> - { 1, 2, 0, 0, 0, 0, 0, COMP, "", 17 }, /* removed */ >> + { 1, 2, 1, 0, 0, 0, 0, OTHR, "TEX_LZ", TGSI_OPCODE_TEX_LZ }, >> { 1, 3, 0, 0, 0, 0, 0, COMP, "LRP", TGSI_OPCODE_LRP }, >> { 1, 3, 0, 0, 0, 0, 0, COMP, "FMA", TGSI_OPCODE_FMA }, >> { 1, 1, 0, 0, 0, 0, 0, REPL, "SQRT", TGSI_OPCODE_SQRT }, >> { 1, 3, 0, 0, 0, 0, 0, REPL, "DP2A", TGSI_OPCODE_DP2A }, >> { 1, 1, 0, 0, 0, 0, 0, COMP, "F2U64", TGSI_OPCODE_F2U64 }, >> { 1, 1, 0, 0, 0, 0, 0, COMP, "F2I64", TGSI_OPCODE_F2I64 }, >> { 1, 1, 0, 0, 0, 0, 0, COMP, "FRC", TGSI_OPCODE_FRC }, >> - { 1, 3, 0, 0, 0, 0, 0, COMP, "", 25 }, /* removed */ >> + { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXF_LZ", TGSI_OPCODE_TXF_LZ }, >> { 1, 1, 0, 0, 0, 0, 0, COMP, "FLR", TGSI_OPCODE_FLR }, >> { 1, 1, 0, 0, 0, 0, 0, COMP, "ROUND", TGSI_OPCODE_ROUND }, >> { 1, 1, 0, 0, 0, 0, 0, REPL, "EX2", TGSI_OPCODE_EX2 }, >> { 1, 1, 0, 0, 0, 0, 0, REPL, "LG2", TGSI_OPCODE_LG2 }, >> { 1, 2, 0, 0, 0, 0, 0, REPL, "POW", TGSI_OPCODE_POW }, >> { 1, 2, 0, 0, 0, 0, 0, COMP, "XPD", TGSI_OPCODE_XPD }, >> { 1, 1, 0, 0, 0, 0, 0, COMP, "U2I64", TGSI_OPCODE_U2I64 }, >> { 1, 1, 0, 0, 0, 0, 0, COMP, "", 33 }, /* removed */ >> { 1, 1, 0, 0, 0, 0, 0, COMP, "I2I64", TGSI_OPCODE_I2I64 }, >> { 1, 2, 0, 0, 0, 0, 0, REPL, "DPH", TGSI_OPCODE_DPH }, >> @@ -469,20 +469,21 @@ tgsi_opcode_infer_type( uint opcode ) >> >> /* >> * infer the source type of a TGSI opcode. >> */ >> enum tgsi_opcode_type >> tgsi_opcode_infer_src_type( uint opcode ) >> { >> switch (opcode) { >> case TGSI_OPCODE_UIF: >> case TGSI_OPCODE_TXF: >> + case TGSI_OPCODE_TXF_LZ: >> case TGSI_OPCODE_BREAKC: >> case TGSI_OPCODE_U2F: >> case TGSI_OPCODE_U2D: >> case TGSI_OPCODE_UADD: >> case TGSI_OPCODE_SWITCH: >> case TGSI_OPCODE_CASE: >> case TGSI_OPCODE_SAMPLE_I: >> case TGSI_OPCODE_SAMPLE_I_MS: >> case TGSI_OPCODE_UMUL_HI: >> case TGSI_OPCODE_UP2H: >> diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c >> b/src/gallium/auxiliary/tgsi/tgsi_scan.c >> index 99799fa..bf614db 100644 >> --- a/src/gallium/auxiliary/tgsi/tgsi_scan.c >> +++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c >> @@ -80,20 +80,22 @@ is_texture_inst(unsigned opcode) >> * Is the opcode an instruction which computes a derivative explicitly or >> * implicitly? >> */ >> static bool >> computes_derivative(unsigned opcode) >> { >> if (tgsi_get_opcode_info(opcode)->is_tex) { >> return opcode != TGSI_OPCODE_TG4 && >> opcode != TGSI_OPCODE_TXD && >> opcode != TGSI_OPCODE_TXF && >> + opcode != TGSI_OPCODE_TXF_LZ && >> + opcode != TGSI_OPCODE_TEX_LZ && >> opcode != TGSI_OPCODE_TXL && >> opcode != TGSI_OPCODE_TXL2 && >> opcode != TGSI_OPCODE_TXQ && >> opcode != TGSI_OPCODE_TXQ_LZ && >> opcode != TGSI_OPCODE_TXQS; >> } >> >> return opcode == TGSI_OPCODE_DDX || opcode == TGSI_OPCODE_DDX_FINE || >> opcode == TGSI_OPCODE_DDY || opcode == TGSI_OPCODE_DDY_FINE || >> opcode == TGSI_OPCODE_SAMPLE || >> diff --git a/src/gallium/docs/source/tgsi.rst >> b/src/gallium/docs/source/tgsi.rst >> index 32ec4ef..b77271a 100644 >> --- a/src/gallium/docs/source/tgsi.rst >> +++ b/src/gallium/docs/source/tgsi.rst >> @@ -748,20 +748,39 @@ This instruction replicates its result. >> >> .. opcode:: DP2 - 2-component Dot Product >> >> This instruction replicates its result. >> >> .. math:: >> >> dst = src0.x \times src1.x + src0.y \times src1.y >> >> >> +.. opcode:: TEX_LZ - Texture Lookup With LOD = 0 >> + >> +.. math:: >> + >> + coord.x = src0.x >> + >> + coord.y = src0.y >> + >> + coord.z = src0.z >> + >> + coord.w = none >> + >> + lod = 0 >> + >> + unit = src1 >> + >> + dst = texture\_sample(unit, coord, lod) >> + >> + >> .. opcode:: TXL - Texture Lookup With explicit LOD >> >> for cube map array textures, the explicit lod value >> cannot be passed in src0.w, and TXL2 must be used instead. >> >> if the target is a shadow texture, the reference value is always >> in src.z (this prevents shadow 3d / 2d array / cube targets from >> using this instruction, but this is not needed). >> >> .. math:: >> @@ -915,20 +934,25 @@ XXX doesn't look like most of the opcodes really >> belong here. >> >> As per NV_gpu_shader4, extract a single texel from a specified texture >> image. The source sampler may not be a CUBE or SHADOW. src 0 is a >> four-component signed integer vector used to identify the single texel >> accessed. 3 components + level. Just like texture instructions, an >> optional >> offset vector is provided, which is subject to various driver >> restrictions >> (regarding range, source of offsets). >> TXF(uint_vec coord, int_vec offset). >> >> >> +.. opcode:: TXF_LZ - Texel Fetch >> + >> + Same as TXF, but the fetched mipmap level is 0. >> + >> + >> .. opcode:: TXQ - Texture Size Query >> >> As per NV_gpu_program4, retrieve the dimensions of the texture >> depending on >> the target. For 1D (width), 2D/RECT/CUBE (width, height), 3D (width, >> height, >> depth), 1D array (width, layers), 2D array (width, height, layers). >> Also return the number of accessible levels (last_level - first_level + >> 1) >> in W. >> >> For components which don't return a resource dimension, their value >> is undefined. >> diff --git a/src/gallium/include/pipe/p_shader_tokens.h >> b/src/gallium/include/pipe/p_shader_tokens.h >> index 1118604..6a3fb98 100644 >> --- a/src/gallium/include/pipe/p_shader_tokens.h >> +++ b/src/gallium/include/pipe/p_shader_tokens.h >> @@ -339,29 +339,29 @@ struct tgsi_property_data { >> #define TGSI_OPCODE_MUL 7 >> #define TGSI_OPCODE_ADD 8 >> #define TGSI_OPCODE_DP3 9 >> #define TGSI_OPCODE_DP4 10 >> #define TGSI_OPCODE_DST 11 >> #define TGSI_OPCODE_MIN 12 >> #define TGSI_OPCODE_MAX 13 >> #define TGSI_OPCODE_SLT 14 >> #define TGSI_OPCODE_SGE 15 >> #define TGSI_OPCODE_MAD 16 >> -/* gap */ >> +#define TGSI_OPCODE_TEX_LZ 17 >> #define TGSI_OPCODE_LRP 18 >> #define TGSI_OPCODE_FMA 19 >> #define TGSI_OPCODE_SQRT 20 >> #define TGSI_OPCODE_DP2A 21 >> #define TGSI_OPCODE_F2U64 22 >> #define TGSI_OPCODE_F2I64 23 >> #define TGSI_OPCODE_FRC 24 >> -/* gap */ >> +#define TGSI_OPCODE_TXF_LZ 25 >> #define TGSI_OPCODE_FLR 26 >> #define TGSI_OPCODE_ROUND 27 >> #define TGSI_OPCODE_EX2 28 >> #define TGSI_OPCODE_LG2 29 >> #define TGSI_OPCODE_POW 30 >> #define TGSI_OPCODE_XPD 31 >> #define TGSI_OPCODE_U2I64 32 >> /* gap */ >> #define TGSI_OPCODE_I2I64 34 >> #define TGSI_OPCODE_DPH 35 >> -- >> 2.7.4 >> >> _______________________________________________ >> mesa-dev mailing list >> [email protected] >> https://lists.freedesktop.org/mailman/listinfo/mesa-dev > > _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
