On 14 March 2017 at 20:56, Bas Nieuwenhuizen <[email protected]> wrote:
> The flushes could be due to TRANSFER barriers. > > Signed-off-by: Bas Nieuwenhuizen <[email protected]> > Cc: 17.0 <[email protected]> > Hi Bas, Are these needed? si_cp_dma_prepare already does a flush. That's why I didn't add a flush to this path on my last patch. Thanks, Alex > --- > src/amd/vulkan/si_cmd_buffer.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_ > buffer.c > index 5d35287f8e3..b808052ddb2 100644 > --- a/src/amd/vulkan/si_cmd_buffer.c > +++ b/src/amd/vulkan/si_cmd_buffer.c > @@ -998,6 +998,7 @@ void si_cp_dma_buffer_copy(struct radv_cmd_buffer > *cmd_buffer, > uint64_t main_src_va, main_dest_va; > uint64_t skipped_size = 0, realign_size = 0; > > + si_emit_cache_flush(cmd_buffer); > > if (cmd_buffer->device->physical_device->rad_info.family <= > CHIP_CARRIZO || > cmd_buffer->device->physical_device->rad_info.family == > CHIP_STONEY) { > @@ -1061,6 +1062,8 @@ void si_cp_dma_clear_buffer(struct radv_cmd_buffer > *cmd_buffer, uint64_t va, > > assert(va % 4 == 0 && size % 4 == 0); > > + si_emit_cache_flush(cmd_buffer); > + > while (size) { > unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT); > unsigned dma_flags = 0; > -- > 2.12.0 > > _______________________________________________ > mesa-dev mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/mesa-dev >
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