CP DMA and PKT3_WRITE_DATA (in CmdUpdateBuffer) don't (currently) write
through L2. Therefore, to make these writes visible to later accesses
we must invalidate L2 rather than just writing it back, to avoid the
possibility that stale data is read through L2.
Cc: "17.0" <mesa-sta...@lists.freedesktop.org>
Signed-off-by: Alex Smith <asm...@feralinteractive.com>
---
It's possible for both CP DMA and PKT3_WRITE_DATA to write through L2
as far as I can see, and changing things so that they do also solves
the problems that this patch fixes.
However, I don't know what the exact consequences of doing so are, or
whether there are any situations where that shouldn't be done, so I've
gone with this fix instead as it seems like a safer option for now.
---
src/amd/vulkan/radv_cmd_buffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index ba192f3..d3397a0 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1477,7 +1477,7 @@ radv_src_access_flush(struct radv_cmd_buffer *cmd_buffer,
RADV_CMD_FLAG_FLUSH_AND_INV_CB_META |
RADV_CMD_FLAG_FLUSH_AND_INV_DB |
RADV_CMD_FLAG_FLUSH_AND_INV_DB_META |
- RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2;
+ RADV_CMD_FLAG_INV_GLOBAL_L2;
break;
default:
break;
--
2.9.3
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