Commit f938354362655a378d474c5f79c52cea9852ab91 recently increased the alignment on vertex buffer data from 32 to 64. This caused us to consume a bit more batch than we were before and we now go over the estimate by a small amount on certain blits on gen8+. This commit bumps then gen8 batch estimate by a bit to compensate. Haswell and older still seems to be well within the limit.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100582 Cc: "13.0 17.0" <[email protected]> --- src/mesa/drivers/dri/i965/genX_blorp_exec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c index b7a23af..2066141 100644 --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c +++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c @@ -181,7 +181,7 @@ genX(blorp_exec)(struct blorp_batch *batch, assert(batch->blorp->driver_ctx == batch->driver_batch); struct brw_context *brw = batch->driver_batch; struct gl_context *ctx = &brw->ctx; - const uint32_t estimated_max_batch_usage = GEN_GEN >= 8 ? 1800 : 1500; + const uint32_t estimated_max_batch_usage = GEN_GEN >= 8 ? 1920 : 1500; bool check_aperture_failed_once = false; /* Flush the sampler and render caches. We definitely need to flush the -- 2.5.0.400.gff86faf _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
