If dynamic eu instruction store size is enabled, the eu instruction store base address(p->store) may change. Like, in the following situation:
struct brw_instruction *jmp = brw_JMPI(p, ...); ... ... /* This somehow may change the p->store base address */ 1) brw_emit_tri_setup(c, false); ... /* * And finally get the jmp distance: * * The old code would do: * &p->store[p->nr_insn] - jmp * If the p->store is changed at line 1), this may instroduce * undefined result, like hang. */ brw_land_fwd_jump(p, jmp); So, the safe way to get the jmp distance is by instruction index. That's what the first 4 patches does. I checked those patches with all intel oglc testcases, and found no regressions. What's better, it fixed something. v2: do not take the brw_insn_of stuff, instead just handle some special cases here, like brw_DO/JMPI, to let them return the instruction index. -- Yuanhan Liu (5): i965: Add a help function brw_insn_index to get the instruction index i965: prepare work for dynamic instruction store size on IF/ELSE/ENDIF i965: prepare work for dynamic instruction store size on DO/WHILE i965: prepare work for dynamic instruction store size on JMPI i965: increase the brw eu instruction store size dynamically src/mesa/drivers/dri/i965/brw_clip_line.c | 2 +- src/mesa/drivers/dri/i965/brw_clip_tri.c | 6 +- src/mesa/drivers/dri/i965/brw_clip_unfilled.c | 4 +- src/mesa/drivers/dri/i965/brw_eu.c | 10 +++- src/mesa/drivers/dri/i965/brw_eu.h | 35 +++++++---- src/mesa/drivers/dri/i965/brw_eu_emit.c | 82 +++++++++++++++--------- src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 11 ++-- src/mesa/drivers/dri/i965/brw_sf_emit.c | 2 +- src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 9 +-- src/mesa/drivers/dri/i965/brw_vs_emit.c | 6 +- src/mesa/drivers/dri/i965/brw_wm_emit.c | 2 +- 11 files changed, 101 insertions(+), 68 deletions(-) -- 1.7.4.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev