---
src/gallium/drivers/radeonsi/si_descriptors.c | 9 ++++-----
src/gallium/drivers/radeonsi/si_state.c | 8 +++++---
src/gallium/drivers/radeonsi/si_state.h | 4 +++-
src/gallium/drivers/radeonsi/si_state_shaders.c | 7 ++-----
4 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
b/src/gallium/drivers/radeonsi/si_descriptors.c
index af68ac9..22888a6 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -999,21 +999,21 @@ static void si_get_buffer_from_descriptors(struct
si_buffer_resources *buffers,
/* VERTEX BUFFERS */
static void si_vertex_buffers_begin_new_cs(struct si_context *sctx)
{
struct si_descriptors *desc = &sctx->vertex_buffers;
int count = sctx->vertex_elements ? sctx->vertex_elements->count : 0;
int i;
for (i = 0; i < count; i++) {
- int vb = sctx->vertex_elements->elements[i].vertex_buffer_index;
+ int vb = sctx->vertex_elements->vertex_buffer_index[i];
if (vb >= ARRAY_SIZE(sctx->vertex_buffer))
continue;
if (!sctx->vertex_buffer[vb].buffer.resource)
continue;
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
(struct
r600_resource*)sctx->vertex_buffer[vb].buffer.resource,
RADEON_USAGE_READ,
RADEON_PRIO_VERTEX_BUFFER);
}
@@ -1058,35 +1058,34 @@ bool si_upload_vertex_buffer_descriptors(struct
si_context *sctx)
if (!desc->buffer)
return false;
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
desc->buffer, RADEON_USAGE_READ,
RADEON_PRIO_DESCRIPTORS);
assert(count <= SI_MAX_ATTRIBS);
for (i = 0; i < count; i++) {
- struct pipe_vertex_element *ve = &velems->elements[i];
struct pipe_vertex_buffer *vb;
struct r600_resource *rbuffer;
unsigned offset;
- unsigned vbo_index = ve->vertex_buffer_index;
+ unsigned vbo_index = velems->vertex_buffer_index[i];
uint32_t *desc = &ptr[i*4];
vb = &sctx->vertex_buffer[vbo_index];
rbuffer = (struct r600_resource*)vb->buffer.resource;
if (!rbuffer) {
memset(desc, 0, 16);
continue;
}
- offset = vb->buffer_offset + ve->src_offset;
+ offset = vb->buffer_offset + velems->src_offset[i];
va = rbuffer->gpu_address + offset;
/* Fill in T# buffer resource description */
desc[0] = va;
desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) |
S_008F04_STRIDE(vb->stride);
if (sctx->b.chip_class != VI && vb->stride) {
/* Round up by rounding down and adding 1 */
desc[2] = (vb->buffer.resource->width0 - offset -
@@ -1630,21 +1629,21 @@ static void si_rebind_buffer(struct pipe_context *ctx,
struct pipe_resource *buf
/* We changed the buffer, now we need to bind it where the old one
* was bound. This consists of 2 things:
* 1) Updating the resource descriptor and dirtying it.
* 2) Adding a relocation to the CS, so that it's usable.
*/
/* Vertex buffers. */
if (rbuffer->bind_history & PIPE_BIND_VERTEX_BUFFER) {
for (i = 0; i < num_elems; i++) {
- int vb =
sctx->vertex_elements->elements[i].vertex_buffer_index;
+ int vb = sctx->vertex_elements->vertex_buffer_index[i];
if (vb >= ARRAY_SIZE(sctx->vertex_buffer))
continue;
if (!sctx->vertex_buffer[vb].buffer.resource)
continue;
if (sctx->vertex_buffer[vb].buffer.resource == buf) {
sctx->vertex_buffers_dirty = true;
break;
}
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 3b15545..1cd1f91 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3733,36 +3733,40 @@ static void *si_create_vertex_elements(struct
pipe_context *ctx,
unsigned data_format, num_format;
int first_non_void;
unsigned vbo_index = elements[i].vertex_buffer_index;
unsigned char swizzle[4];
if (vbo_index >= SI_NUM_VERTEX_BUFFERS) {
FREE(v);
return NULL;
}
- if (elements[i].instance_divisor)
+ if (elements[i].instance_divisor) {
v->uses_instance_divisors = true;
+ v->instance_divisors[i] = elements[i].instance_divisor;
+ }
if (!used[vbo_index]) {
v->first_vb_use_mask |= 1 << i;
used[vbo_index] = true;
}
desc = util_format_description(elements[i].src_format);
first_non_void =
util_format_get_first_non_void_channel(elements[i].src_format);
data_format = si_translate_buffer_dataformat(ctx->screen, desc,
first_non_void);
num_format = si_translate_buffer_numformat(ctx->screen, desc,
first_non_void);
channel = first_non_void >= 0 ? &desc->channel[first_non_void]
: NULL;
memcpy(swizzle, desc->swizzle, sizeof(swizzle));
v->format_size[i] = desc->block.bits / 8;
+ v->src_offset[i] = elements[i].src_offset;
+ v->vertex_buffer_index[i] = vbo_index;
/* The hardware always treats the 2-bit alpha channel as
* unsigned, so a shader workaround is needed. The affected
* chips are VI and older except Stoney (GFX8.1).
*/
if (data_format == V_008F0C_BUF_DATA_FORMAT_2_10_10_10 &&
sscreen->b.chip_class <= VI &&
sscreen->b.family != CHIP_STONEY) {
if (num_format == V_008F0C_BUF_NUM_FORMAT_SNORM) {
v->fix_fetch[i] = SI_FIX_FETCH_A2_SNORM;
@@ -3841,22 +3845,20 @@ static void *si_create_vertex_elements(struct
pipe_context *ctx,
}
}
v->rsrc_word3[i] = S_008F0C_DST_SEL_X(si_map_swizzle(swizzle[0])) |
S_008F0C_DST_SEL_Y(si_map_swizzle(swizzle[1])) |
S_008F0C_DST_SEL_Z(si_map_swizzle(swizzle[2])) |
S_008F0C_DST_SEL_W(si_map_swizzle(swizzle[3])) |
S_008F0C_NUM_FORMAT(num_format) |
S_008F0C_DATA_FORMAT(data_format);
}
- memcpy(v->elements, elements, sizeof(struct pipe_vertex_element) *
count);
-
return v;
}
static void si_bind_vertex_elements(struct pipe_context *ctx, void *state)
{
struct si_context *sctx = (struct si_context *)ctx;
struct si_vertex_elements *old = sctx->vertex_elements;
struct si_vertex_elements *v = (struct si_vertex_elements*)state;
sctx->vertex_elements = v;
diff --git a/src/gallium/drivers/radeonsi/si_state.h
b/src/gallium/drivers/radeonsi/si_state.h
index 63a1713..99c8ee6 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -101,21 +101,23 @@ struct si_stencil_ref {
struct si_vertex_elements
{
unsigned count;
unsigned first_vb_use_mask;
/* Vertex buffer descriptor list size aligned for optimal prefetch. */
unsigned desc_list_byte_size;
uint8_t fix_fetch[SI_MAX_ATTRIBS];
uint32_t rsrc_word3[SI_MAX_ATTRIBS];
uint32_t format_size[SI_MAX_ATTRIBS];
- struct pipe_vertex_element elements[SI_MAX_ATTRIBS];
+ uint8_t vertex_buffer_index[SI_MAX_ATTRIBS];
+ uint16_t src_offset[SI_MAX_ATTRIBS];
+ unsigned instance_divisors[SI_MAX_ATTRIBS];
bool uses_instance_divisors;
};
union si_state {
struct {
struct si_state_blend *blend;
struct si_state_rasterizer *rasterizer;
struct si_state_dsa *dsa;
struct si_pm4_state *poly_offset;
struct si_pm4_state *ls;
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 6247b9c..848c5a7 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1182,25 +1182,22 @@ static unsigned si_get_alpha_test_func(struct
si_context *sctx)
static void si_shader_selector_key_vs(struct si_context *sctx,
struct si_shader_selector *vs,
struct si_shader_key *key,
struct si_vs_prolog_bits *prolog_key)
{
if (!sctx->vertex_elements)
return;
unsigned count = MIN2(vs->info.num_inputs,
sctx->vertex_elements->count);
- for (unsigned i = 0; i < count; ++i) {
- prolog_key->instance_divisors[i] =
- sctx->vertex_elements->elements[i].instance_divisor;
- }
-
+ memcpy(prolog_key->instance_divisors,
+ sctx->vertex_elements->instance_divisors, count * 4);
memcpy(key->mono.vs_fix_fetch, sctx->vertex_elements->fix_fetch, count);
}
static void si_shader_selector_key_hw_vs(struct si_context *sctx,
struct si_shader_selector *vs,
struct si_shader_key *key)
{
struct si_shader_selector *ps = sctx->ps_shader.cso;
key->opt.clip_disable =
