On 24 July 2017 at 11:44, Dave Airlie <airl...@gmail.com> wrote:
> From: Dave Airlie <airl...@redhat.com>
>
> Fixes CTS dEQP-VK.memory.pipeline_barrier.host_write_uniform_
> texel_buffer.1024
> on SI/CIK with radv.
>
> Fixes: f4e499ec (radv: add initial non-conformant radv vulkan driver)
> Signed-off-by: Dave Airlie <airl...@redhat.com>
> ---
> src/amd/vulkan/radv_image.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
> index 66cff52..2b81618 100644
> --- a/src/amd/vulkan/radv_image.c
> +++ b/src/amd/vulkan/radv_image.c
> @@ -181,6 +181,11 @@ radv_make_buffer_descriptor(struct radv_device
> *device,
> state[0] = va;
> state[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) |
> S_008F04_STRIDE(stride);
> +
> + if (device->physical_device->rad_info.chip_class != VI && stride)
> {
> + range /= stride;
> + }
> +
>
Should this be < VI instead? Unless the same is required for GFX9?
Alex
> state[2] = range;
> state[3] = S_008F0C_DST_SEL_X(radv_map_swizzle(desc->swizzle[0]))
> |
> S_008F0C_DST_SEL_Y(radv_map_swizzle(desc->swizzle[1]))
> |
> --
> 2.9.4
>
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