Matt Turner <matts...@gmail.com> writes:

> The hardware encodings often mean different things depending on whether
> the source is an immediate.
> ---
>  src/intel/compiler/brw_disasm.c      |  46 ++++++++-------
>  src/intel/compiler/brw_eu_compact.c  |   8 +--
>  src/intel/compiler/brw_eu_defines.h  |  48 +++++++++------
>  src/intel/compiler/brw_eu_emit.c     | 109 
> +++++++++++++++++------------------
>  src/intel/compiler/brw_eu_validate.c |  60 +++++++++----------
>  src/intel/compiler/brw_reg.h         |   2 +
>  6 files changed, 144 insertions(+), 129 deletions(-)
>
> diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
> index 3a33614523..b5c283058a 100644
> --- a/src/intel/compiler/brw_disasm.c
> +++ b/src/intel/compiler/brw_disasm.c
> @@ -238,17 +238,18 @@ static const char *const access_mode[2] = {
>  };
>  
>  static const char * const reg_encoding[] = {
> -   [BRW_HW_REG_TYPE_UD]          = "UD",
> -   [BRW_HW_REG_TYPE_D]           = "D",
> -   [BRW_HW_REG_TYPE_UW]          = "UW",
> -   [BRW_HW_REG_TYPE_W]           = "W",
> -   [BRW_HW_REG_NON_IMM_TYPE_UB]  = "UB",
> -   [BRW_HW_REG_NON_IMM_TYPE_B]   = "B",
> -   [GEN7_HW_REG_NON_IMM_TYPE_DF] = "DF",
> -   [BRW_HW_REG_TYPE_F]           = "F",
> -   [GEN8_HW_REG_TYPE_UQ]         = "UQ",
> -   [GEN8_HW_REG_TYPE_Q]          = "Q",
> -   [GEN8_HW_REG_NON_IMM_TYPE_HF] = "HF",
> +   [BRW_HW_REG_TYPE_UD]  = "UD",
> +   [BRW_HW_REG_TYPE_D]   = "D",
> +   [BRW_HW_REG_TYPE_UW]  = "UW",
> +   [BRW_HW_REG_TYPE_W]   = "W",
> +   [BRW_HW_REG_TYPE_F]   = "F",
> +   [GEN8_HW_REG_TYPE_UQ] = "UQ",
> +   [GEN8_HW_REG_TYPE_Q]  = "Q",
> +
> +   [BRW_HW_REG_TYPE_UB]  = "UB",
> +   [BRW_HW_REG_TYPE_B]   = "B",
> +   [GEN7_HW_REG_TYPE_DF] = "DF",
> +   [GEN8_HW_REG_TYPE_HF] = "HF",
>  };
>  
>  static const char *const three_source_reg_encoding[] = {
> @@ -1024,41 +1025,42 @@ src2_3src(FILE *file, const struct gen_device_info 
> *devinfo, const brw_inst *ins
>  }
>  
>  static int
> -imm(FILE *file, const struct gen_device_info *devinfo, unsigned type, const 
> brw_inst *inst)
> +imm(FILE *file, const struct gen_device_info *devinfo, enum hw_imm_type type,
> +    const brw_inst *inst)
>  {
>     switch (type) {
> -   case BRW_HW_REG_TYPE_UD:
> +   case BRW_HW_IMM_TYPE_UD:
>        format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst));
>        break;
> -   case BRW_HW_REG_TYPE_D:
> +   case BRW_HW_IMM_TYPE_D:
>        format(file, "%dD", brw_inst_imm_d(devinfo, inst));
>        break;
> -   case BRW_HW_REG_TYPE_UW:
> +   case BRW_HW_IMM_TYPE_UW:
>        format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst));
>        break;
> -   case BRW_HW_REG_TYPE_W:
> +   case BRW_HW_IMM_TYPE_W:
>        format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst));
>        break;
> -   case BRW_HW_REG_IMM_TYPE_UV:
> +   case BRW_HW_IMM_TYPE_UV:
>        format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst));
>        break;
> -   case BRW_HW_REG_IMM_TYPE_VF:
> +   case BRW_HW_IMM_TYPE_VF:
>        format(file, "[%-gF, %-gF, %-gF, %-gF]VF",
>               brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
>               brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8),
>               brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16),
>               brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24));
>        break;
> -   case BRW_HW_REG_IMM_TYPE_V:
> +   case BRW_HW_IMM_TYPE_V:
>        format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst));
>        break;
> -   case BRW_HW_REG_TYPE_F:
> +   case BRW_HW_IMM_TYPE_F:
>        format(file, "%-gF", brw_inst_imm_f(devinfo, inst));
>        break;
> -   case GEN8_HW_REG_IMM_TYPE_DF:
> +   case GEN8_HW_IMM_TYPE_DF:
>        format(file, "%-gDF", brw_inst_imm_df(devinfo, inst));
>        break;
> -   case GEN8_HW_REG_IMM_TYPE_HF:
> +   case GEN8_HW_IMM_TYPE_HF:
>        string(file, "Half Float IMM");
>        break;
>     }
> diff --git a/src/intel/compiler/brw_eu_compact.c 
> b/src/intel/compiler/brw_eu_compact.c
> index 79103d7883..bca526f592 100644
> --- a/src/intel/compiler/brw_eu_compact.c
> +++ b/src/intel/compiler/brw_eu_compact.c
> @@ -995,9 +995,9 @@ precompact(const struct gen_device_info *devinfo, 
> brw_inst inst)
>         !(devinfo->is_haswell &&
>           brw_inst_opcode(devinfo, &inst) == BRW_OPCODE_DIM) &&
>         !(devinfo->gen >= 8 &&
> -         (brw_inst_src0_reg_type(devinfo, &inst) == GEN8_HW_REG_IMM_TYPE_DF 
> ||
> -          brw_inst_src0_reg_type(devinfo, &inst) == GEN8_HW_REG_TYPE_UQ ||
> -          brw_inst_src0_reg_type(devinfo, &inst) == GEN8_HW_REG_TYPE_Q))) {
> +         (brw_inst_src0_reg_type(devinfo, &inst) == GEN8_HW_IMM_TYPE_DF ||
> +          brw_inst_src0_reg_type(devinfo, &inst) == GEN8_HW_IMM_TYPE_UQ ||
> +          brw_inst_src0_reg_type(devinfo, &inst) == GEN8_HW_IMM_TYPE_Q))) {
>        brw_inst_set_src1_reg_type(devinfo, &inst, BRW_HW_REG_TYPE_UD);
>     }
>  
> @@ -1016,7 +1016,7 @@ precompact(const struct gen_device_info *devinfo, 
> brw_inst inst)
>         brw_inst_src0_reg_type(devinfo, &inst) == BRW_HW_REG_TYPE_F &&
>         brw_inst_dst_reg_type(devinfo, &inst) == BRW_HW_REG_TYPE_F &&
>         brw_inst_dst_hstride(devinfo, &inst) == BRW_HORIZONTAL_STRIDE_1) {
> -      brw_inst_set_src0_reg_type(devinfo, &inst, BRW_HW_REG_IMM_TYPE_VF);
> +      brw_inst_set_src0_reg_type(devinfo, &inst, BRW_HW_IMM_TYPE_VF);
>     }
>  
>     /* There are no mappings for dst:d | i:d, so if the immediate is suitable
> diff --git a/src/intel/compiler/brw_eu_defines.h 
> b/src/intel/compiler/brw_eu_defines.h
> index 1af835d47e..44bde3ff51 100644
> --- a/src/intel/compiler/brw_eu_defines.h
> +++ b/src/intel/compiler/brw_eu_defines.h
> @@ -819,24 +819,36 @@ enum PACKED brw_reg_file {
>     BAD_FILE,
>  };
>  
> -#define BRW_HW_REG_TYPE_UD  0
> -#define BRW_HW_REG_TYPE_D   1
> -#define BRW_HW_REG_TYPE_UW  2
> -#define BRW_HW_REG_TYPE_W   3
> -#define BRW_HW_REG_TYPE_F   7
> -#define GEN8_HW_REG_TYPE_UQ 8
> -#define GEN8_HW_REG_TYPE_Q  9
> -
> -#define BRW_HW_REG_NON_IMM_TYPE_UB  4
> -#define BRW_HW_REG_NON_IMM_TYPE_B   5
> -#define GEN7_HW_REG_NON_IMM_TYPE_DF 6
> -#define GEN8_HW_REG_NON_IMM_TYPE_HF 10
> -
> -#define BRW_HW_REG_IMM_TYPE_UV  4 /* Gen6+ packed unsigned immediate vector 
> */
> -#define BRW_HW_REG_IMM_TYPE_VF  5 /* packed float immediate vector */
> -#define BRW_HW_REG_IMM_TYPE_V   6 /* packed int imm. vector; uword dest only 
> */
> -#define GEN8_HW_REG_IMM_TYPE_DF 10
> -#define GEN8_HW_REG_IMM_TYPE_HF 11
> +enum hw_reg_type {
> +   BRW_HW_REG_TYPE_UD  = 0,
> +   BRW_HW_REG_TYPE_D   = 1,
> +   BRW_HW_REG_TYPE_UW  = 2,
> +   BRW_HW_REG_TYPE_W   = 3,
> +   BRW_HW_REG_TYPE_F   = 7,
> +   GEN8_HW_REG_TYPE_UQ = 8,
> +   GEN8_HW_REG_TYPE_Q  = 9,
> +
> +   BRW_HW_REG_TYPE_UB  = 4,
> +   BRW_HW_REG_TYPE_B   = 5,
> +   GEN7_HW_REG_TYPE_DF = 6,
> +   GEN8_HW_REG_TYPE_HF = 10,
> +};
> +
> +enum hw_imm_type {
> +   BRW_HW_IMM_TYPE_UD  = 0,
> +   BRW_HW_IMM_TYPE_D   = 1,
> +   BRW_HW_IMM_TYPE_UW  = 2,
> +   BRW_HW_IMM_TYPE_W   = 3,
> +   BRW_HW_IMM_TYPE_F   = 7,
> +   GEN8_HW_IMM_TYPE_UQ = 8,
> +   GEN8_HW_IMM_TYPE_Q  = 9,
> +
> +   BRW_HW_IMM_TYPE_UV  = 4, /* Gen6+ packed unsigned immediate vector */
> +   BRW_HW_IMM_TYPE_VF  = 5, /* packed float immediate vector */
> +   BRW_HW_IMM_TYPE_V   = 6, /* packed int imm. vector; uword dest only */
> +   GEN8_HW_IMM_TYPE_DF = 10,
> +   GEN8_HW_IMM_TYPE_HF = 11,
> +};
>  
>  /* SNB adds 3-src instructions (MAD and LRP) that only operate on floats, so
>   * the types were implied. IVB adds BFE and BFI2 that operate on doublewords
> diff --git a/src/intel/compiler/brw_eu_emit.c 
> b/src/intel/compiler/brw_eu_emit.c
> index b59fc33a54..69ebf6345c 100644
> --- a/src/intel/compiler/brw_eu_emit.c
> +++ b/src/intel/compiler/brw_eu_emit.c
> @@ -94,40 +94,37 @@ brw_reg_type_to_hw_type(const struct gen_device_info 
> *devinfo,
>                          enum brw_reg_type type, enum brw_reg_file file)
>  {
>     if (file == BRW_IMMEDIATE_VALUE) {
> -      static const int imm_hw_types[] = {
> -         [BRW_REGISTER_TYPE_UD] = BRW_HW_REG_TYPE_UD,
> -         [BRW_REGISTER_TYPE_D]  = BRW_HW_REG_TYPE_D,
> -         [BRW_REGISTER_TYPE_UW] = BRW_HW_REG_TYPE_UW,
> -         [BRW_REGISTER_TYPE_W]  = BRW_HW_REG_TYPE_W,
> -         [BRW_REGISTER_TYPE_F]  = BRW_HW_REG_TYPE_F,
> -         [BRW_REGISTER_TYPE_UB] = -1,
> -         [BRW_REGISTER_TYPE_B]  = -1,
> -         [BRW_REGISTER_TYPE_UV] = BRW_HW_REG_IMM_TYPE_UV,
> -         [BRW_REGISTER_TYPE_VF] = BRW_HW_REG_IMM_TYPE_VF,
> -         [BRW_REGISTER_TYPE_V]  = BRW_HW_REG_IMM_TYPE_V,
> -         [BRW_REGISTER_TYPE_DF] = GEN8_HW_REG_IMM_TYPE_DF,
> -         [BRW_REGISTER_TYPE_HF] = GEN8_HW_REG_IMM_TYPE_HF,
> -         [BRW_REGISTER_TYPE_UQ] = GEN8_HW_REG_TYPE_UQ,
> -         [BRW_REGISTER_TYPE_Q]  = GEN8_HW_REG_TYPE_Q,
> +      static const enum hw_imm_type hw_types[] = {
> +         [0 ... BRW_REGISTER_TYPE_LAST] = -1,
> +         [BRW_REGISTER_TYPE_UD] = BRW_HW_IMM_TYPE_UD,
> +         [BRW_REGISTER_TYPE_D]  = BRW_HW_IMM_TYPE_D,
> +         [BRW_REGISTER_TYPE_UW] = BRW_HW_IMM_TYPE_UW,
> +         [BRW_REGISTER_TYPE_W]  = BRW_HW_IMM_TYPE_W,
> +         [BRW_REGISTER_TYPE_F]  = BRW_HW_IMM_TYPE_F,
> +         [BRW_REGISTER_TYPE_UV] = BRW_HW_IMM_TYPE_UV,
> +         [BRW_REGISTER_TYPE_VF] = BRW_HW_IMM_TYPE_VF,
> +         [BRW_REGISTER_TYPE_V]  = BRW_HW_IMM_TYPE_V,
> +         [BRW_REGISTER_TYPE_DF] = GEN8_HW_IMM_TYPE_DF,
> +         [BRW_REGISTER_TYPE_HF] = GEN8_HW_IMM_TYPE_HF,
> +         [BRW_REGISTER_TYPE_UQ] = GEN8_HW_IMM_TYPE_UQ,
> +         [BRW_REGISTER_TYPE_Q]  = GEN8_HW_IMM_TYPE_Q,
>        };
> -      assert(type < ARRAY_SIZE(imm_hw_types));
> -      assert(imm_hw_types[type] != -1);
> -      return imm_hw_types[type];
> +      assert(type < ARRAY_SIZE(hw_types));
> +      assert(hw_types[type] != -1);
> +      return hw_types[type];
>     } else {
>        /* Non-immediate registers */
> -      static const int hw_types[] = {
> +      static const enum hw_reg_type hw_types[] = {
> +         [0 ... BRW_REGISTER_TYPE_LAST] = -1,
>           [BRW_REGISTER_TYPE_UD] = BRW_HW_REG_TYPE_UD,
>           [BRW_REGISTER_TYPE_D]  = BRW_HW_REG_TYPE_D,
>           [BRW_REGISTER_TYPE_UW] = BRW_HW_REG_TYPE_UW,
>           [BRW_REGISTER_TYPE_W]  = BRW_HW_REG_TYPE_W,
> -         [BRW_REGISTER_TYPE_UB] = BRW_HW_REG_NON_IMM_TYPE_UB,
> -         [BRW_REGISTER_TYPE_B]  = BRW_HW_REG_NON_IMM_TYPE_B,
> +         [BRW_REGISTER_TYPE_UB] = BRW_HW_REG_TYPE_UB,
> +         [BRW_REGISTER_TYPE_B]  = BRW_HW_REG_TYPE_B,
>           [BRW_REGISTER_TYPE_F]  = BRW_HW_REG_TYPE_F,
> -         [BRW_REGISTER_TYPE_UV] = -1,
> -         [BRW_REGISTER_TYPE_VF] = -1,
> -         [BRW_REGISTER_TYPE_V]  = -1,
> -         [BRW_REGISTER_TYPE_DF] = GEN7_HW_REG_NON_IMM_TYPE_DF,
> -         [BRW_REGISTER_TYPE_HF] = GEN8_HW_REG_NON_IMM_TYPE_HF,
> +         [BRW_REGISTER_TYPE_DF] = GEN7_HW_REG_TYPE_DF,
> +         [BRW_REGISTER_TYPE_HF] = GEN8_HW_REG_TYPE_HF,
>           [BRW_REGISTER_TYPE_UQ] = GEN8_HW_REG_TYPE_UQ,
>           [BRW_REGISTER_TYPE_Q]  = GEN8_HW_REG_TYPE_Q,
>        };
> @@ -147,40 +144,42 @@ brw_hw_reg_type_to_size(const struct gen_device_info 
> *devinfo,
>                          unsigned type, enum brw_reg_file file)
>  {
>     if (file == BRW_IMMEDIATE_VALUE) {
> -      static const unsigned imm_hw_sizes[] = {
> -         [BRW_HW_REG_TYPE_UD]      = 4,
> -         [BRW_HW_REG_TYPE_D]       = 4,
> -         [BRW_HW_REG_TYPE_UW]      = 2,
> -         [BRW_HW_REG_TYPE_W]       = 2,
> -         [BRW_HW_REG_IMM_TYPE_UV]  = 2,
> -         [BRW_HW_REG_IMM_TYPE_VF]  = 4,
> -         [BRW_HW_REG_IMM_TYPE_V]   = 2,
> -         [BRW_HW_REG_TYPE_F]       = 4,
> -         [GEN8_HW_REG_TYPE_UQ]     = 8,
> -         [GEN8_HW_REG_TYPE_Q]      = 8,
> -         [GEN8_HW_REG_IMM_TYPE_DF] = 8,
> -         [GEN8_HW_REG_IMM_TYPE_HF] = 2,
> +      static const int hw_sizes[] = {
> +         [0 ... 15]            = -1,
> +         [BRW_HW_IMM_TYPE_UD]  = 4,
> +         [BRW_HW_IMM_TYPE_D]   = 4,
> +         [BRW_HW_IMM_TYPE_UW]  = 2,
> +         [BRW_HW_IMM_TYPE_W]   = 2,
> +         [BRW_HW_IMM_TYPE_UV]  = 2,
> +         [BRW_HW_IMM_TYPE_VF]  = 4,
> +         [BRW_HW_IMM_TYPE_V]   = 2,

Is this right? I see it was there before, and perhaps I'm being dense,
but it seems like V and UV should be size 4 from the PRM.

> +         [BRW_HW_IMM_TYPE_F]   = 4,
> +         [GEN8_HW_IMM_TYPE_UQ] = 8,
> +         [GEN8_HW_IMM_TYPE_Q]  = 8,
> +         [GEN8_HW_IMM_TYPE_DF] = 8,
> +         [GEN8_HW_IMM_TYPE_HF] = 2,
>        };
> -      assert(type < ARRAY_SIZE(imm_hw_sizes));
> -      assert(devinfo->gen >= 6 || type != BRW_HW_REG_IMM_TYPE_UV);
> -      assert(devinfo->gen >= 8 || type <= BRW_HW_REG_TYPE_F);
> -      return imm_hw_sizes[type];
> +      assert(type < ARRAY_SIZE(hw_sizes));
> +      assert(hw_sizes[type] != -1);
> +      return hw_sizes[type];
>     } else {
>        /* Non-immediate registers */
> -      static const unsigned hw_sizes[] = {
> -         [BRW_HW_REG_TYPE_UD]          = 4,
> -         [BRW_HW_REG_TYPE_D]           = 4,
> -         [BRW_HW_REG_TYPE_UW]          = 2,
> -         [BRW_HW_REG_TYPE_W]           = 2,
> -         [BRW_HW_REG_NON_IMM_TYPE_UB]  = 1,
> -         [BRW_HW_REG_NON_IMM_TYPE_B]   = 1,
> -         [GEN7_HW_REG_NON_IMM_TYPE_DF] = 8,
> -         [BRW_HW_REG_TYPE_F]           = 4,
> -         [GEN8_HW_REG_TYPE_UQ]         = 8,
> -         [GEN8_HW_REG_TYPE_Q]          = 8,
> -         [GEN8_HW_REG_NON_IMM_TYPE_HF] = 2,
> +      static const int hw_sizes[] = {
> +         [0 ... 15]            = -1,
> +         [BRW_HW_REG_TYPE_UD]  = 4,
> +         [BRW_HW_REG_TYPE_D]   = 4,
> +         [BRW_HW_REG_TYPE_UW]  = 2,
> +         [BRW_HW_REG_TYPE_W]   = 2,
> +         [BRW_HW_REG_TYPE_UB]  = 1,
> +         [BRW_HW_REG_TYPE_B]   = 1,
> +         [GEN7_HW_REG_TYPE_DF] = 8,
> +         [BRW_HW_REG_TYPE_F]   = 4,
> +         [GEN8_HW_REG_TYPE_UQ] = 8,
> +         [GEN8_HW_REG_TYPE_Q]  = 8,
> +         [GEN8_HW_REG_TYPE_HF] = 2,
>        };
>        assert(type < ARRAY_SIZE(hw_sizes));
> +      assert(hw_sizes[type] != -1);
>        return hw_sizes[type];
>     }
>  }
> diff --git a/src/intel/compiler/brw_eu_validate.c 
> b/src/intel/compiler/brw_eu_validate.c
> index 7f0595e6f8..54e0a2e62e 100644
> --- a/src/intel/compiler/brw_eu_validate.c
> +++ b/src/intel/compiler/brw_eu_validate.c
> @@ -82,11 +82,11 @@ static unsigned
>  signed_type(unsigned type)
>  {
>     switch (type) {
> -   case BRW_HW_REG_TYPE_UD:         return BRW_HW_REG_TYPE_D;
> -   case BRW_HW_REG_TYPE_UW:         return BRW_HW_REG_TYPE_W;
> -   case BRW_HW_REG_NON_IMM_TYPE_UB: return BRW_HW_REG_NON_IMM_TYPE_B;
> -   case GEN8_HW_REG_TYPE_UQ:        return GEN8_HW_REG_TYPE_Q;
> -   default:                         return type;
> +   case BRW_HW_REG_TYPE_UD:  return BRW_HW_REG_TYPE_D;
> +   case BRW_HW_REG_TYPE_UW:  return BRW_HW_REG_TYPE_W;
> +   case BRW_HW_REG_TYPE_UB:  return BRW_HW_REG_TYPE_B;
> +   case GEN8_HW_REG_TYPE_UQ: return GEN8_HW_REG_TYPE_Q;
> +   default:                  return type;
>     }
>  }
>  
> @@ -98,9 +98,9 @@ inst_is_raw_move(const struct gen_device_info *devinfo, 
> const brw_inst *inst)
>  
>     if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
>        /* FIXME: not strictly true */
> -      if (brw_inst_src0_reg_type(devinfo, inst) == BRW_HW_REG_IMM_TYPE_VF ||
> -          brw_inst_src0_reg_type(devinfo, inst) == BRW_HW_REG_IMM_TYPE_UV ||
> -          brw_inst_src0_reg_type(devinfo, inst) == BRW_HW_REG_IMM_TYPE_V) {
> +      if (brw_inst_src0_reg_type(devinfo, inst) == BRW_HW_IMM_TYPE_VF ||
> +          brw_inst_src0_reg_type(devinfo, inst) == BRW_HW_IMM_TYPE_UV ||
> +          brw_inst_src0_reg_type(devinfo, inst) == BRW_HW_IMM_TYPE_V) {
>           return false;
>        }
>     } else if (brw_inst_src0_negate(devinfo, inst) ||
> @@ -269,18 +269,18 @@ execution_type_for_type(unsigned type, bool 
> is_immediate)
>      */
>     if (is_immediate) {
>        switch (type) {
> -      case BRW_HW_REG_IMM_TYPE_UV:
> -      case BRW_HW_REG_IMM_TYPE_V:
> +      case BRW_HW_IMM_TYPE_UV:
> +      case BRW_HW_IMM_TYPE_V:
>           type = BRW_HW_REG_TYPE_W;
>           break;
> -      case BRW_HW_REG_IMM_TYPE_VF:
> +      case BRW_HW_IMM_TYPE_VF:
>           type = BRW_HW_REG_TYPE_F;
>           break;
> -      case GEN8_HW_REG_IMM_TYPE_DF:
> -         type = GEN7_HW_REG_NON_IMM_TYPE_DF;
> +      case GEN8_HW_IMM_TYPE_DF:
> +         type = GEN7_HW_REG_TYPE_DF;
>           break;
> -      case GEN8_HW_REG_IMM_TYPE_HF:
> -         type = GEN8_HW_REG_NON_IMM_TYPE_HF;
> +      case GEN8_HW_IMM_TYPE_HF:
> +         type = GEN8_HW_IMM_TYPE_HF;
>           break;
>        default:
>           break;
> @@ -293,15 +293,15 @@ execution_type_for_type(unsigned type, bool 
> is_immediate)
>        return BRW_HW_REG_TYPE_D;
>     case BRW_HW_REG_TYPE_UW:
>     case BRW_HW_REG_TYPE_W:
> -   case BRW_HW_REG_NON_IMM_TYPE_UB:
> -   case BRW_HW_REG_NON_IMM_TYPE_B:
> +   case BRW_HW_REG_TYPE_UB:
> +   case BRW_HW_REG_TYPE_B:
>        return BRW_HW_REG_TYPE_W;
>     case GEN8_HW_REG_TYPE_UQ:
>     case GEN8_HW_REG_TYPE_Q:
>        return GEN8_HW_REG_TYPE_Q;
>     case BRW_HW_REG_TYPE_F:
> -   case GEN7_HW_REG_NON_IMM_TYPE_DF:
> -   case GEN8_HW_REG_NON_IMM_TYPE_HF:
> +   case GEN7_HW_REG_TYPE_DF:
> +   case GEN8_HW_REG_TYPE_HF:
>        return type;
>     default:
>        unreachable("not reached");
> @@ -332,7 +332,7 @@ execution_type(const struct gen_device_info *devinfo, 
> const brw_inst *inst)
>     src0_exec_type = execution_type_for_type(src0_type, src0_is_immediate);
>     if (num_sources == 1) {
>        if ((devinfo->gen >= 9 || devinfo->is_cherryview) &&
> -          src0_exec_type == GEN8_HW_REG_NON_IMM_TYPE_HF) {
> +          src0_exec_type == GEN8_HW_REG_TYPE_HF) {
>           return dst_exec_type;
>        }
>        return src0_exec_type;
> @@ -362,9 +362,9 @@ execution_type(const struct gen_device_info *devinfo, 
> const brw_inst *inst)
>         src1_exec_type == BRW_HW_REG_TYPE_W)
>        return BRW_HW_REG_TYPE_W;
>  
> -   if (src0_exec_type == GEN7_HW_REG_NON_IMM_TYPE_DF ||
> -       src1_exec_type == GEN7_HW_REG_NON_IMM_TYPE_DF)
> -      return GEN7_HW_REG_NON_IMM_TYPE_DF;
> +   if (src0_exec_type == GEN7_HW_REG_TYPE_DF ||
> +       src1_exec_type == GEN7_HW_REG_TYPE_DF)
> +      return GEN7_HW_REG_TYPE_DF;
>  
>     if (devinfo->gen >= 9 || devinfo->is_cherryview) {
>        if (dst_exec_type == BRW_HW_REG_TYPE_F ||
> @@ -372,7 +372,7 @@ execution_type(const struct gen_device_info *devinfo, 
> const brw_inst *inst)
>            src1_exec_type == BRW_HW_REG_TYPE_F) {
>           return BRW_HW_REG_TYPE_F;
>        } else {
> -         return GEN8_HW_REG_NON_IMM_TYPE_HF;
> +         return GEN8_HW_REG_TYPE_HF;
>        }
>     }
>  
> @@ -443,8 +443,8 @@ general_restrictions_based_on_operand_types(const struct 
> gen_device_info *devinf
>  
>     unsigned dst_stride = 1 << (brw_inst_dst_hstride(devinfo, inst) - 1);
>     bool dst_type_is_byte =
> -      brw_inst_dst_reg_type(devinfo, inst) == BRW_HW_REG_NON_IMM_TYPE_B ||
> -      brw_inst_dst_reg_type(devinfo, inst) == BRW_HW_REG_NON_IMM_TYPE_UB;
> +      brw_inst_dst_reg_type(devinfo, inst) == BRW_HW_REG_TYPE_B ||
> +      brw_inst_dst_reg_type(devinfo, inst) == BRW_HW_REG_TYPE_UB;
>  
>     if (dst_type_is_byte) {
>        if (is_packed(exec_size * dst_stride, exec_size, dst_stride)) {
> @@ -1072,14 +1072,14 @@ vector_immediate_restrictions(const struct 
> gen_device_info *devinfo,
>      * applies.
>      */
>     switch (type) {
> -   case BRW_HW_REG_IMM_TYPE_V:
> -   case BRW_HW_REG_IMM_TYPE_UV:
> -   case BRW_HW_REG_IMM_TYPE_VF:
> +   case BRW_HW_IMM_TYPE_V:
> +   case BRW_HW_IMM_TYPE_UV:
> +   case BRW_HW_IMM_TYPE_VF:
>        ERROR_IF(dst_subreg % (128 / 8) != 0,
>                 "Destination must be 128-bit aligned in order to use 
> immediate "
>                 "vector types");
>  
> -      if (type == BRW_HW_REG_IMM_TYPE_VF) {
> +      if (type == BRW_HW_IMM_TYPE_VF) {
>           ERROR_IF(dst_type_size * dst_stride != 4,
>                    "Destination must have stride equivalent to dword in order 
> "
>                    "to use the VF type");
> diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h
> index 48e6fd7b7d..bd179606b0 100644
> --- a/src/intel/compiler/brw_reg.h
> +++ b/src/intel/compiler/brw_reg.h
> @@ -222,6 +222,8 @@ enum PACKED brw_reg_type {
>     BRW_REGISTER_TYPE_V,
>     BRW_REGISTER_TYPE_UV,
>     /** @} */
> +
> +   BRW_REGISTER_TYPE_LAST = BRW_REGISTER_TYPE_UV
>  };
>  
>  unsigned brw_reg_type_to_hw_type(const struct gen_device_info *devinfo,
> -- 
> 2.13.0
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
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