On 18.08.2017 19:06, Marek Olšák wrote:
Ping.
On Wed, Aug 16, 2017 at 12:57 AM, Marek Olšák <mar...@gmail.com> wrote:
From: Marek Olšák <marek.ol...@amd.com>
The workaround will do for now. The root cause is still unknown.
This fixes new piglit: 16in-1out
I don't see this test. Did you already send it out?
Cc: 17.1 17.2 <mesa-sta...@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com>
---
src/gallium/drivers/radeonsi/si_state_draw.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/gallium/drivers/radeonsi/si_state_draw.c
index f17f570..a26e38d 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -187,21 +187,25 @@ static void si_emit_derived_tess_state(struct si_context
*sctx,
/* Make sure the output data fits in the offchip buffer */
*num_patches = MIN2(*num_patches,
(sctx->screen->tess_offchip_block_dw_size * 4) /
output_patch_size);
/* Not necessary for correctness, but improves performance. The
* specific value is taken from the proprietary driver.
*/
*num_patches = MIN2(*num_patches, 40);
- if (sctx->b.chip_class == SI) {
+ if (sctx->b.chip_class == SI ||
+ /* TODO: fix GFX9 where a threadgroup contains more than 1 wave and
+ * LS vertices per patch > HS vertices per patch. Piglit: 16in-1out
*/
+ (sctx->b.chip_class == GFX9 &&
+ num_tcs_input_cp > num_tcs_output_cp)) {
/* SI bug workaround, related to power management. Limit LS-HS
* threadgroups to only one wave.
*/
unsigned one_wave = 64 / MAX2(num_tcs_input_cp,
num_tcs_output_cp);
*num_patches = MIN2(*num_patches, one_wave);
}
/* The VGT HS block increments the patch ID unconditionally
* within a single threadgroup. This results in incorrect
* patch IDs when instanced draws are used.
--
2.7.4
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