Just for future reference, we are addessing common code in src/intel/compiler. Do we still want to use i965 prefix?
On Tue, Aug 22, 2017 at 01:58:01PM -0700, Kenneth Graunke wrote: > Render target surfaces always start at binding table index 0. > This is required for us to use headerless FB writes, which we > really want to do. So, we'll never change that. > > Given that, it's not necessary to look up a wm_prog_data field > which we already know contains 0. We can drop the dependency in > brw_renderbuffer_surfaces (Gen4-5)...which was already confusingly > missing from gen6_renderbuffer_surfaces. > --- > src/intel/compiler/brw_fs_generator.cpp | 9 +++++++-- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 10 +++------- > 2 files changed, 10 insertions(+), 9 deletions(-) > > diff --git a/src/intel/compiler/brw_fs_generator.cpp > b/src/intel/compiler/brw_fs_generator.cpp > index 2ade486705b..c101c4696ef 100644 > --- a/src/intel/compiler/brw_fs_generator.cpp > +++ b/src/intel/compiler/brw_fs_generator.cpp > @@ -277,8 +277,13 @@ fs_generator::fire_fb_write(fs_inst *inst, > else > msg_control = > BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01; > > - uint32_t surf_index = > - prog_data->binding_table.render_target_start + inst->target; > + /* We assume render targets start at 0, because headerless FB write > + * messages set "Render Target Index" to 0. Using a different binding > + * table index would make it impossible to use headerless messages. > + */ > + assert(prog_data->binding_table.render_target_start == 0); > + > + uint32_t surf_index = inst->target; Could be const. There was similar nit in another patch, either way, really nice clean-up and series: Reviewed-by: Topi Pohjolainen <[email protected]> > > bool last_render_target = inst->eot || > (prog_data->dual_src_blend && dispatch_width == > 16); > diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > index 5cfdbe58102..8c901df8e97 100644 > --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > @@ -990,14 +990,11 @@ update_renderbuffer_surfaces(struct brw_context *brw) > { > const struct gl_context *ctx = &brw->ctx; > > - /* BRW_NEW_FS_PROG_DATA */ > - const struct brw_wm_prog_data *wm_prog_data = > - brw_wm_prog_data(brw->wm.base.prog_data); > - > /* _NEW_BUFFERS | _NEW_COLOR */ > const struct gl_framebuffer *fb = ctx->DrawBuffer; > > - const unsigned rt_start = wm_prog_data->binding_table.render_target_start; > + /* Render targets always start at binding table index 0. */ > + const unsigned rt_start = 0; > > uint32_t *surf_offsets = brw->wm.base.surf_offset; > > @@ -1025,8 +1022,7 @@ const struct brw_tracked_state > brw_renderbuffer_surfaces = { > .dirty = { > .mesa = _NEW_BUFFERS | > _NEW_COLOR, > - .brw = BRW_NEW_BATCH | > - BRW_NEW_FS_PROG_DATA, > + .brw = BRW_NEW_BATCH, > }, > .emit = update_renderbuffer_surfaces, > }; > -- > 2.14.1 > > _______________________________________________ > mesa-dev mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
