From: Marek Olšák <[email protected]>

for C++ editors
---
 src/gallium/drivers/radeonsi/si_uvd.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_uvd.c 
b/src/gallium/drivers/radeonsi/si_uvd.c
index 9f5daad..758e5cb 100644
--- a/src/gallium/drivers/radeonsi/si_uvd.c
+++ b/src/gallium/drivers/radeonsi/si_uvd.c
@@ -41,39 +41,39 @@
  * creates an video buffer with an UVD compatible memory layout
  */
 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
                                                 const struct pipe_video_buffer 
*tmpl)
 {
        struct si_context *ctx = (struct si_context *)pipe;
        struct r600_texture *resources[VL_NUM_COMPONENTS] = {};
        struct radeon_surf *surfaces[VL_NUM_COMPONENTS] = {};
        struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};
        const enum pipe_format *resource_formats;
-       struct pipe_video_buffer template;
+       struct pipe_video_buffer vidtemplate;
        struct pipe_resource templ;
        unsigned i, array_size;
 
        assert(pipe);
 
        /* first create the needed resources as "normal" textures */
        resource_formats = vl_video_buffer_formats(pipe->screen, 
tmpl->buffer_format);
        if (!resource_formats)
                return NULL;
 
        array_size = tmpl->interlaced ? 2 : 1;
-       template = *tmpl;
-       template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
-       template.height = align(tmpl->height / array_size, 
VL_MACROBLOCK_HEIGHT);
+       vidtemplate = *tmpl;
+       vidtemplate.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
+       vidtemplate.height = align(tmpl->height / array_size, 
VL_MACROBLOCK_HEIGHT);
 
        for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
                if (resource_formats[i] != PIPE_FORMAT_NONE) {
-                       vl_video_buffer_template(&templ, &template,
+                       vl_video_buffer_template(&templ, &vidtemplate,
                                                 resource_formats[i], 1,
                                                 array_size, 
PIPE_USAGE_DEFAULT, i);
                        /* Set PIPE_BIND_SHARED to avoid reallocation in 
r600_texture_get_handle,
                         * which can't handle joined surfaces. */
                        /* TODO: get tiling working */
                        templ.bind = PIPE_BIND_LINEAR | PIPE_BIND_SHARED;
                        resources[i] = (struct r600_texture *)
                                        
pipe->screen->resource_create(pipe->screen, &templ);
                        if (!resources[i]) goto error;
                }
@@ -91,22 +91,22 @@ struct pipe_video_buffer *si_video_buffer_create(struct 
pipe_context *pipe,
 
        for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
                if (!resources[i])
                        continue;
 
                /* reset the address */
                resources[i]->resource.gpu_address = 
ctx->b.ws->buffer_get_virtual_address(
                        resources[i]->resource.buf);
        }
 
-       template.height *= array_size;
-       return vl_video_buffer_create_ex2(pipe, &template, (struct 
pipe_resource **)resources);
+       vidtemplate.height *= array_size;
+       return vl_video_buffer_create_ex2(pipe, &vidtemplate, (struct 
pipe_resource **)resources);
 
 error:
        for (i = 0; i < VL_NUM_COMPONENTS; ++i)
                r600_texture_reference(&resources[i], NULL);
 
        return NULL;
 }
 
 /* set the decoding target buffer offsets */
 static struct pb_buffer* si_uvd_set_dtb(struct ruvd_msg *msg, struct 
vl_video_buffer *buf)
-- 
2.7.4

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