From: Marek Olšák <[email protected]>
v2: set swizzled usage mask
---
src/gallium/auxiliary/tgsi/tgsi_scan.c | 43 +++++++++++++++++++++++++++++++++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index 1f8904c..989c57e 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -451,20 +451,43 @@ scan_instruction(struct tgsi_shader_info *info,
fullinst->Instruction.Opcode == TGSI_OPCODE_D2U64 ||
fullinst->Instruction.Opcode == TGSI_OPCODE_D2I64 ||
fullinst->Instruction.Opcode == TGSI_OPCODE_U642D ||
fullinst->Instruction.Opcode == TGSI_OPCODE_I642D)
info->uses_doubles = TRUE;
for (i = 0; i < fullinst->Instruction.NumSrcRegs; i++) {
scan_src_operand(info, fullinst, &fullinst->Src[i], i,
tgsi_util_get_inst_usage_mask(fullinst, i),
is_interp_instruction, &is_mem_inst);
+
+ if (fullinst->Src[i].Register.Indirect) {
+ struct tgsi_full_src_register src = {{0}};
+
+ src.Register.File = fullinst->Src[i].Indirect.File;
+ src.Register.Index = fullinst->Src[i].Indirect.Index;
+
+ scan_src_operand(info, fullinst, &src, -1,
+ 1 << fullinst->Src[i].Indirect.Swizzle,
+ false, NULL);
+ }
+
+ if (fullinst->Src[i].Register.Dimension &&
+ fullinst->Src[i].Dimension.Indirect) {
+ struct tgsi_full_src_register src = {{0}};
+
+ src.Register.File = fullinst->Src[i].DimIndirect.File;
+ src.Register.Index = fullinst->Src[i].DimIndirect.Index;
+
+ scan_src_operand(info, fullinst, &src, -1,
+ 1 << fullinst->Src[i].DimIndirect.Swizzle,
+ false, NULL);
+ }
}
if (fullinst->Instruction.Texture) {
for (i = 0; i < fullinst->Texture.NumOffsets; i++) {
struct tgsi_full_src_register src = {{0}};
src.Register.File = fullinst->TexOffsets[i].File;
src.Register.Index = fullinst->TexOffsets[i].Index;
/* The usage mask is suboptimal but should be safe. */
@@ -472,27 +495,45 @@ scan_instruction(struct tgsi_shader_info *info,
(1 << fullinst->TexOffsets[i].SwizzleX) |
(1 << fullinst->TexOffsets[i].SwizzleY) |
(1 << fullinst->TexOffsets[i].SwizzleZ),
false, &is_mem_inst);
}
}
/* check for indirect register writes */
for (i = 0; i < fullinst->Instruction.NumDstRegs; i++) {
const struct tgsi_full_dst_register *dst = &fullinst->Dst[i];
+
if (dst->Register.Indirect) {
+ struct tgsi_full_src_register src = {{0}};
+
+ src.Register.File = dst->Indirect.File;
+ src.Register.Index = dst->Indirect.Index;
+
+ scan_src_operand(info, fullinst, &src, -1,
+ 1 << dst->Indirect.Swizzle, false, NULL);
+
info->indirect_files |= (1 << dst->Register.File);
info->indirect_files_written |= (1 << dst->Register.File);
}
- if (dst->Register.Dimension && dst->Dimension.Indirect)
+ if (dst->Register.Dimension && dst->Dimension.Indirect) {
+ struct tgsi_full_src_register src = {{0}};
+
+ src.Register.File = dst->DimIndirect.File;
+ src.Register.Index = dst->DimIndirect.Index;
+
+ scan_src_operand(info, fullinst, &src, -1,
+ 1 << dst->DimIndirect.Swizzle, false, NULL);
+
info->dim_indirect_files |= 1u << dst->Register.File;
+ }
if (is_memory_file(dst->Register.File)) {
assert(fullinst->Instruction.Opcode == TGSI_OPCODE_STORE);
is_mem_inst = true;
info->writes_memory = TRUE;
if (dst->Register.File == TGSI_FILE_IMAGE) {
if (dst->Register.Indirect)
info->images_store = info->images_declared;
