Some hardware (CHV, BXT) have special restrictions on register regions when doing integer multiplication. We want to respect those when we lower to DxW multiplication.
Cc: mesa-sta...@lists.freedesktop.org --- src/intel/compiler/brw_fs.cpp | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 56455e9..1c4351b 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -3482,18 +3482,20 @@ fs_visitor::lower_integer_multiplication() bool needs_mov = false; fs_reg orig_dst = inst->dst; + fs_reg low = inst->dst; if (orig_dst.is_null() || orig_dst.file == MRF || regions_overlap(inst->dst, inst->size_written, inst->src[0], inst->size_read(0)) || regions_overlap(inst->dst, inst->size_written, inst->src[1], inst->size_read(1))) { needs_mov = true; - inst->dst = fs_reg(VGRF, alloc.allocate(dispatch_width / 8), - inst->dst.type); + low.nr = alloc.allocate(regs_written(inst)); + low.offset = low.offset % REG_SIZE; } - fs_reg low = inst->dst; - fs_reg high(VGRF, alloc.allocate(dispatch_width / 8), - inst->dst.type); + + fs_reg high = inst->dst; + high.nr = alloc.allocate(regs_written(inst)); + high.offset = high.offset % REG_SIZE; if (devinfo->gen >= 7) { if (inst->src[1].file == IMM) { @@ -3514,13 +3516,13 @@ fs_visitor::lower_integer_multiplication() inst->src[1]); } - ibld.ADD(subscript(inst->dst, BRW_REGISTER_TYPE_UW, 1), + ibld.ADD(subscript(low, BRW_REGISTER_TYPE_UW, 1), subscript(low, BRW_REGISTER_TYPE_UW, 1), subscript(high, BRW_REGISTER_TYPE_UW, 0)); if (needs_mov || inst->conditional_mod) { set_condmod(inst->conditional_mod, - ibld.MOV(orig_dst, inst->dst)); + ibld.MOV(orig_dst, low)); } } -- 2.5.0.400.gff86faf _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev