On Tue, Nov 7, 2017 at 4:58 PM, <boyuan.zh...@amd.com> wrote:
> From: Boyuan Zhang <boyuan.zh...@amd.com>
>
> Signed-off-by: Boyuan Zhang <boyuan.zh...@amd.com>
> ---
> src/gallium/drivers/radeon/radeon_vcn_enc.h | 325
> ++++++++++++++++++++++++++++
> 1 file changed, 325 insertions(+)
> create mode 100644 src/gallium/drivers/radeon/radeon_vcn_enc.h
>
> diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.h
> b/src/gallium/drivers/radeon/radeon_vcn_enc.h
> new file mode 100644
> index 0000000..a58ff6b
> --- /dev/null
> +++ b/src/gallium/drivers/radeon/radeon_vcn_enc.h
> @@ -0,0 +1,325 @@
> +/**************************************************************************
> + *
> + * Copyright 2017 Advanced Micro Devices, Inc.
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the
> + + * "Software"), to deal in the Software without restriction,
> including
Extras '+' here.
> + * without limitation the rights to use, copy, modify, merge, publish,
> + * distribute, sub license, and/or sell copies of the Software, and to
> + * permit persons to whom the Software is furnished to do so, subject to
> + * the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the
> + + * next paragraph) shall be included in all copies or
> substantial portions
and here.
> + * of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
> + * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
> + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
> + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> + *
> + **************************************************************************/
> +
> +#ifndef _RADEON_VCN_ENC_H
> +#define _RADEON_VCN_ENC_H
> +
> +#define RENCODE_FW_INTERFACE_MAJOR_VERSION 1
> +#define RENCODE_FW_INTERFACE_MINOR_VERSION 2
> +
> +#define RENCODE_IB_PARAM_SESSION_INFO 0x00000001
> +#define RENCODE_IB_PARAM_TASK_INFO 0x00000002
> +#define RENCODE_IB_PARAM_SESSION_INIT 0x00000003
> +#define RENCODE_IB_PARAM_LAYER_CONTROL 0x00000004
> +#define RENCODE_IB_PARAM_LAYER_SELECT 0x00000005
> +#define RENCODE_IB_PARAM_RATE_CONTROL_SESSION_INIT 0x00000006
> +#define RENCODE_IB_PARAM_RATE_CONTROL_LAYER_INIT 0x00000007
> +#define RENCODE_IB_PARAM_RATE_CONTROL_PER_PICTURE 0x00000008
> +#define RENCODE_IB_PARAM_QUALITY_PARAMS 0x00000009
> +#define RENCODE_IB_PARAM_SLICE_HEADER 0x0000000a
> +#define RENCODE_IB_PARAM_ENCODE_PARAMS 0x0000000b
> +#define RENCODE_IB_PARAM_INTRA_REFRESH 0x0000000c
> +#define RENCODE_IB_PARAM_ENCODE_CONTEXT_BUFFER 0x0000000d
> +#define RENCODE_IB_PARAM_VIDEO_BITSTREAM_BUFFER 0x0000000e
> +#define RENCODE_IB_PARAM_FEEDBACK_BUFFER 0x00000010
> +#define RENCODE_IB_PARAM_DIRECT_OUTPUT_NALU 0x00000020
> +
> +#define RENCODE_H264_IB_PARAM_SLICE_CONTROL 0x00200001
> +#define RENCODE_H264_IB_PARAM_SPEC_MISC 0x00200002
> +#define RENCODE_H264_IB_PARAM_ENCODE_PARAMS 0x00200003
> +#define RENCODE_H264_IB_PARAM_DEBLOCKING_FILTER 0x00200004
> +
> +#define RENCODE_IB_OP_INITIALIZE 0x01000001
> +#define RENCODE_IB_OP_CLOSE_SESSION 0x01000002
> +#define RENCODE_IB_OP_ENCODE 0x01000003
> +#define RENCODE_IB_OP_INIT_RC 0x01000004
> +#define RENCODE_IB_OP_INIT_RC_VBV_BUFFER_LEVEL 0x01000005
> +#define RENCODE_IB_OP_SET_SPEED_ENCODING_MODE 0x01000006
> +#define RENCODE_IB_OP_SET_BALANCE_ENCODING_MODE 0x01000007
> +#define RENCODE_IB_OP_SET_QUALITY_ENCODING_MODE 0x01000008
> +
> +#define RENCODE_IF_MAJOR_VERSION_MASK 0xFFFF0000
> +#define RENCODE_IF_MAJOR_VERSION_SHIFT 16
> +#define RENCODE_IF_MINOR_VERSION_MASK 0x0000FFFF
> +#define RENCODE_IF_MINOR_VERSION_SHIFT 0
> +
> +#define RENCODE_ENCODE_STANDARD_H264 1
> +
> +#define RENCODE_PREENCODE_MODE_NONE 0x00000000
> +#define RENCODE_PREENCODE_MODE_1X 0x00000001
> +#define RENCODE_PREENCODE_MODE_2X 0x00000002
> +#define RENCODE_PREENCODE_MODE_4X 0x00000004
> +
> +#define RENCODE_H264_SLICE_CONTROL_MODE_FIXED_MBS 0x00000000
> +#define RENCODE_H264_SLICE_CONTROL_MODE_FIXED_BITS 0x00000001
> +
> +#define RENCODE_RATE_CONTROL_METHOD_NONE
> 0x00000000
> +#define RENCODE_RATE_CONTROL_METHOD_LATENCY_CONSTRAINED_VBR
> 0x00000001
> +#define RENCODE_RATE_CONTROL_METHOD_PEAK_CONSTRAINED_VBR
> 0x00000002
> +#define RENCODE_RATE_CONTROL_METHOD_CBR
> 0x00000003
> +
> +#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_AUD
> 0x00000000
> +#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_VPS
> 0x00000001
> +#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_SPS
> 0x00000002
> +#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_PPS
> 0x00000003
> +#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_PREFIX
> 0x00000004
> +#define RENCODE_DIRECT_OUTPUT_NALU_TYPE_END_OF_SEQUENCE
> 0x00000005
> +
> +#define RENCODE_SLICE_HEADER_TEMPLATE_MAX_TEMPLATE_SIZE_IN_DWORDS 16
> +#define RENCODE_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS 16
> +
> +#define RENCODE_HEADER_INSTRUCTION_END 0x00000000
> +#define RENCODE_HEADER_INSTRUCTION_COPY 0x00000001
> +
> +#define RENCODE_H264_HEADER_INSTRUCTION_FIRST_MB 0x00020000
> +#define RENCODE_H264_HEADER_INSTRUCTION_SLICE_QP_DELTA 0x00020001
> +
> +#define RENCODE_PICTURE_TYPE_B 0
> +#define RENCODE_PICTURE_TYPE_P 1
> +#define RENCODE_PICTURE_TYPE_I 2
> +#define RENCODE_PICTURE_TYPE_P_SKIP 3
> +
> +#define RENCODE_INPUT_SWIZZLE_MODE_LINEAR 0
> +#define RENCODE_INPUT_SWIZZLE_MODE_256B_S 1
> +#define RENCODE_INPUT_SWIZZLE_MODE_4kB_S 5
> +#define RENCODE_INPUT_SWIZZLE_MODE_64kB_S 9
> +
> +#define RENCODE_H264_PICTURE_STRUCTURE_FRAME 0
> +#define RENCODE_H264_PICTURE_STRUCTURE_TOP_FIELD 1
> +#define RENCODE_H264_PICTURE_STRUCTURE_BOTTOM_FIELD 2
> +
> +#define RENCODE_H264_INTERLACING_MODE_PROGRESSIVE 0
> +#define RENCODE_H264_INTERLACING_MODE_INTERLACED_STACKED 1
> +#define RENCODE_H264_INTERLACING_MODE_INTERLACED_INTERLEAVED 2
> +
> +#define RENCODE_H264_DISABLE_DEBLOCKING_FILTER_IDC_ENABLE
> 0
> +#define RENCODE_H264_DISABLE_DEBLOCKING_FILTER_IDC_DISABLE
> 1
> +#define
> RENCODE_H264_DISABLE_DEBLOCKING_FILTER_IDC_DISALBE_ACROSS_SLICE_BOUNDARY
> 2
> +
> +#define RENCODE_INTRA_REFRESH_MODE_NONE 0
> +#define RENCODE_INTRA_REFRESH_MODE_CTB_MB_ROWS 1
> +#define RENCODE_INTRA_REFRESH_MODE_CTB_MB_COLUMNS 2
> +
> +#define RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES 34
> +
> +#define RENCODE_REC_SWIZZLE_MODE_LINEAR 0
> +#define RENCODE_REC_SWIZZLE_MODE_256B_S 1
> +
> +#define RENCODE_VIDEO_BITSTREAM_BUFFER_MODE_LINEAR 0
> +#define RENCODE_VIDEO_BITSTREAM_BUFFER_MODE_CIRCULAR 1
> +
> +#define RENCODE_FEEDBACK_BUFFER_MODE_LINEAR 0
> +#define RENCODE_FEEDBACK_BUFFER_MODE_CIRCULAR 1
> +
> +typedef struct rvcn_enc_session_info_s
> +{
> + unsigned int interface_version;
> + unsigned int sw_context_address_hi;
> + unsigned int sw_context_address_lo;
If these are used directly with the firmware, wouldn't it be better to
use explicitly sized types? E.g., uint32_t
Alex
> +} rvcn_enc_session_info_t;
> +
> +typedef struct rvcn_enc_task_info_s
> +{
> + unsigned int total_size_of_all_packages;
> + unsigned int task_id;
> + unsigned int allowed_max_num_feedbacks;
> +} rvcn_enc_task_info_t;
> +
> +typedef struct rvcn_enc_session_init_s
> +{
> + unsigned int encode_standard;
> + unsigned int aligned_picture_width;
> + unsigned int aligned_picture_height;
> + unsigned int padding_width;
> + unsigned int padding_height;
> + unsigned int pre_encode_mode;
> + unsigned int pre_encode_chroma_enabled;
> +} rvcn_enc_session_init_t;
> +
> +typedef struct rvcn_enc_layer_control_s
> +{
> + unsigned int max_num_temporal_layers;
> + unsigned int num_temporal_layers;
> +} rvcn_enc_layer_control_t;
> +
> +typedef struct rvcn_enc_layer_select_s
> +{
> + unsigned int temporal_layer_index;
> +} rvcn_enc_layer_select_t;
> +
> +typedef struct rvcn_enc_h264_slice_control_s
> +{
> + unsigned int slice_control_mode;
> + union
> + {
> + unsigned int num_mbs_per_slice;
> + unsigned int num_bits_per_slice;
> + };
> +} rvcn_enc_h264_slice_control_t;
> +
> +typedef struct rvcn_enc_h264_spec_misc_s
> +{
> + unsigned int constrained_intra_pred_flag;
> + unsigned int cabac_enable;
> + unsigned int cabac_init_idc;
> + unsigned int half_pel_enabled;
> + unsigned int quarter_pel_enabled;
> + unsigned int profile_idc;
> + unsigned int level_idc;
> +} rvcn_enc_h264_spec_misc_t;
> +
> +typedef struct rvcn_enc_rate_ctl_session_init_s
> +{
> + unsigned int rate_control_method;
> + unsigned int vbv_buffer_level;
> +} rvcn_enc_rate_ctl_session_init_t;
> +
> +typedef struct rvcn_enc_rate_ctl_layer_init_s
> +{
> + unsigned int target_bit_rate;
> + unsigned int peak_bit_rate;
> + unsigned int frame_rate_num;
> + unsigned int frame_rate_den;
> + unsigned int vbv_buffer_size;
> + unsigned int avg_target_bits_per_picture;
> + unsigned int peak_bits_per_picture_integer;
> + unsigned int peak_bits_per_picture_fractional;
> +} rvcn_enc_rate_ctl_layer_init_t;
> +
> +typedef struct rvcn_enc_rate_ctl_per_picture_s
> +{
> + unsigned int qp;
> + unsigned int min_qp_app;
> + unsigned int max_qp_app;
> + unsigned int max_au_size;
> + unsigned int enabled_filler_data;
> + unsigned int skip_frame_enable;
> + unsigned int enforce_hrd;
> +} rvcn_enc_rate_ctl_per_picture_t;
> +
> +typedef struct rvcn_enc_quality_params_s
> +{
> + unsigned int vbaq_mode;
> + unsigned int scene_change_sensitivity;
> + unsigned int scene_change_min_idr_interval;
> +} rvcn_enc_quality_params_t;
> +
> +typedef struct rvcn_enc_direct_output_nalu_s
> +{
> + unsigned int type;
> + unsigned int size;
> + unsigned int data[1];
> +} rvcn_enc_direct_output_nalu_t;
> +
> +typedef struct rvcn_enc_slice_header_s
> +{
> + unsigned int
> bitstream_template[RENCODE_SLICE_HEADER_TEMPLATE_MAX_TEMPLATE_SIZE_IN_DWORDS];
> + struct {
> + unsigned int instruction;
> + unsigned int num_bits;
> + } instructions[RENCODE_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS];
> +} rvcn_enc_slice_header_t;
> +
> +typedef struct rvcn_enc_encode_params_s
> +{
> + unsigned int pic_type;
> + unsigned int allowed_max_bitstream_size;
> + unsigned int input_picture_luma_address_hi;
> + unsigned int input_picture_luma_address_lo;
> + unsigned int input_picture_chroma_address_hi;
> + unsigned int input_picture_chroma_address_lo;
> + unsigned int input_pic_luma_pitch;
> + unsigned int input_pic_chroma_pitch;
> + unsigned char input_pic_swizzle_mode;
> + unsigned int reference_picture_index;
> + unsigned int reconstructed_picture_index;
> +} rvcn_enc_encode_params_t;
> +
> +typedef struct rvcn_enc_h264_encode_params_s
> +{
> + unsigned int input_picture_structure;
> + unsigned int interlaced_mode;
> + unsigned int reference_picture_structure;
> + unsigned int reference_picture1_index;
> +} rvcn_enc_h264_encode_params_t;
> +
> +typedef struct rvcn_enc_h264_deblocking_filter_s
> +{
> + unsigned int disable_deblocking_filter_idc;
> + int alpha_c0_offset_div2;
> + int beta_offset_div2;
> + int cb_qp_offset;
> + int cr_qp_offset;
> +} rvcn_enc_h264_deblocking_filter_t;
> +
> +typedef struct rvcn_enc_intra_refresh_s
> +{
> + unsigned int intra_refresh_mode;
> + unsigned int offset;
> + unsigned int region_size;
> +} rvcn_enc_intra_refresh_t;
> +
> +typedef struct rvcn_enc_reconstructed_picture_s
> +{
> + unsigned int luma_offset;
> + unsigned int chroma_offset;
> +} rvcn_enc_reconstructed_picture_t;
> +
> +typedef struct rvcn_enc_encode_context_buffer_s
> +{
> + unsigned int encode_context_address_hi;
> + unsigned int encode_context_address_lo;
> + unsigned int swizzle_mode;
> + unsigned int rec_luma_pitch;
> + unsigned int rec_chroma_pitch;
> + unsigned int num_reconstructed_pictures;
> + rvcn_enc_reconstructed_picture_t
> reconstructed_pictures[RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES];
> + unsigned int pre_encode_picture_luma_pitch;
> + unsigned int pre_encode_picture_chroma_pitch;
> + rvcn_enc_reconstructed_picture_t
> pre_encode_reconstructed_pictures[RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES];
> + rvcn_enc_reconstructed_picture_t pre_encode_input_picture;
> +} rvcn_enc_encode_context_buffer_t;
> +
> +typedef struct rvcn_enc_video_bitstream_buffer_s
> +{
> + unsigned int mode;
> + unsigned int video_bitstream_buffer_address_hi;
> + unsigned int video_bitstream_buffer_address_lo;
> + unsigned int video_bitstream_buffer_size;
> + unsigned int video_bitstream_data_offset;
> +} rvcn_enc_video_bitstream_buffer_t;
> +
> +typedef struct rvcn_enc_feedback_buffer_s
> +{
> + unsigned int mode;
> + unsigned int feedback_buffer_address_hi;
> + unsigned int feedback_buffer_address_lo;
> + unsigned int feedback_buffer_size;
> + unsigned int feedback_data_size;
> +} rvcn_enc_feedback_buffer_t;
> +
> +#endif // _RADEON_VCN_ENC_H
> --
> 2.7.4
>
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