You might want this applied before your patch: https://patchwork.freedesktop.org/patch/187534/
Marek On Fri, Nov 10, 2017 at 4:13 AM, Timothy Arceri <tarc...@itsqueeze.com> wrote: > --- > src/gallium/drivers/radeonsi/si_shader.c | 22 +++++++++++----------- > 1 file changed, 11 insertions(+), 11 deletions(-) > > diff --git a/src/gallium/drivers/radeonsi/si_shader.c > b/src/gallium/drivers/radeonsi/si_shader.c > index 3708696c69..37d97cb341 100644 > --- a/src/gallium/drivers/radeonsi/si_shader.c > +++ b/src/gallium/drivers/radeonsi/si_shader.c > @@ -1078,50 +1078,49 @@ static LLVMValueRef buffer_load(struct > lp_build_tgsi_context *bld_base, > } > > /** > * Load from LDS. > * > * \param type output value type > * \param swizzle offset (typically 0..3); it can be ~0, which loads a > vec4 > * \param dw_addr address in dwords > */ > static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base, > - enum tgsi_opcode_type type, unsigned swizzle, > + LLVMTypeRef type, unsigned swizzle, > LLVMValueRef dw_addr) > { > struct si_shader_context *ctx = si_shader_context(bld_base); > LLVMValueRef value; > > if (swizzle == ~0) { > LLVMValueRef values[TGSI_NUM_CHANNELS]; > > for (unsigned chan = 0; chan < TGSI_NUM_CHANNELS; chan++) > values[chan] = lds_load(bld_base, type, chan, > dw_addr); > > return lp_build_gather_values(&ctx->gallivm, values, > TGSI_NUM_CHANNELS); > } > > dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr, > LLVMConstInt(ctx->i32, swizzle, 0)); > > value = ac_lds_load(&ctx->ac, dw_addr); > - if (tgsi_type_is_64bit(type)) { > + if (llvm_type_is_64bit(ctx, type)) { > LLVMValueRef value2; > dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr, > ctx->i32_1); > value2 = ac_lds_load(&ctx->ac, dw_addr); > - return si_llvm_emit_fetch_64bit(bld_base, > tgsi2llvmtype(bld_base, type), > - value, value2); > + return si_llvm_emit_fetch_64bit(bld_base, type, value, > value2); > } > > - return bitcast(bld_base, type, value); > + return bitcast_llvmtype(ctx, type, value); > } > > /** > * Store to LDS. > * > * \param swizzle offset (typically 0..3) > * \param dw_addr address in dwords > * \param value value to store > */ > static void lds_store(struct si_shader_context *ctx, > @@ -1163,41 +1162,41 @@ static LLVMValueRef fetch_input_tcs( > const struct tgsi_full_src_register *reg, > enum tgsi_opcode_type type, unsigned swizzle) > { > struct si_shader_context *ctx = si_shader_context(bld_base); > LLVMValueRef dw_addr, stride; > > stride = get_tcs_in_vertex_dw_stride(ctx); > dw_addr = get_tcs_in_current_patch_offset(ctx); > dw_addr = get_dw_address(ctx, NULL, reg, stride, dw_addr); > > - return lds_load(bld_base, type, swizzle, dw_addr); > + return lds_load(bld_base, tgsi2llvmtype(bld_base, type), swizzle, > dw_addr); > } > > static LLVMValueRef fetch_output_tcs( > struct lp_build_tgsi_context *bld_base, > const struct tgsi_full_src_register *reg, > enum tgsi_opcode_type type, unsigned swizzle) > { > struct si_shader_context *ctx = si_shader_context(bld_base); > LLVMValueRef dw_addr, stride; > > if (reg->Register.Dimension) { > stride = get_tcs_out_vertex_dw_stride(ctx); > dw_addr = get_tcs_out_current_patch_offset(ctx); > dw_addr = get_dw_address(ctx, NULL, reg, stride, dw_addr); > } else { > dw_addr = get_tcs_out_current_patch_data_offset(ctx); > dw_addr = get_dw_address(ctx, NULL, reg, NULL, dw_addr); > } > > - return lds_load(bld_base, type, swizzle, dw_addr); > + return lds_load(bld_base, tgsi2llvmtype(bld_base, type), swizzle, > dw_addr); > } > > static LLVMValueRef fetch_input_tes( > struct lp_build_tgsi_context *bld_base, > const struct tgsi_full_src_register *reg, > enum tgsi_opcode_type type, unsigned swizzle) > { > struct si_shader_context *ctx = si_shader_context(bld_base); > LLVMValueRef buffer, base, addr; > > @@ -1347,21 +1346,22 @@ static LLVMValueRef fetch_input_gs( > vtx_offset = unpack_param(ctx, > ctx->param_gs_vtx45_offset, > index % 2 ? 16 : 0, 16); > break; > default: > assert(0); > return NULL; > } > > vtx_offset = LLVMBuildAdd(ctx->ac.builder, vtx_offset, > LLVMConstInt(ctx->i32, param * 4, > 0), ""); > - return lds_load(bld_base, type, swizzle, vtx_offset); > + return lds_load(bld_base, tgsi2llvmtype(bld_base, type), > + swizzle, vtx_offset); > } > > /* GFX6: input load from the ESGS ring in memory. */ > if (swizzle == ~0) { > LLVMValueRef values[TGSI_NUM_CHANNELS]; > unsigned chan; > for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { > values[chan] = fetch_input_gs(bld_base, reg, type, > chan); > } > return lp_build_gather_values(&ctx->gallivm, values, > @@ -2751,21 +2751,21 @@ static void si_copy_tcs_inputs(struct > lp_build_tgsi_context *bld_base) > > LLVMValueRef lds_ptr = LLVMBuildAdd(ctx->ac.builder, lds_base, > LLVMConstInt(ctx->i32, 4 * i, 0), > ""); > > LLVMValueRef buffer_addr = get_tcs_tes_buffer_address(ctx, > get_rel_patch_id(ctx), > invocation_id, > LLVMConstInt(ctx->i32, i, 0)); > > - LLVMValueRef value = lds_load(bld_base, TGSI_TYPE_SIGNED, ~0, > + LLVMValueRef value = lds_load(bld_base, ctx->ac.i32, ~0, > lds_ptr); > > ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, > buffer_addr, > buffer_offset, 0, 1, 0, true, > false); > } > } > > static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base, > LLVMValueRef rel_patch_id, > LLVMValueRef invocation_id, > @@ -2838,25 +2838,25 @@ static void si_write_tess_factors(struct > lp_build_tgsi_context *bld_base, > lds_base = tcs_out_current_patch_data_offset; > lds_inner = LLVMBuildAdd(ctx->ac.builder, lds_base, > LLVMConstInt(ctx->i32, > tess_inner_index * 4, > 0), ""); > lds_outer = LLVMBuildAdd(ctx->ac.builder, lds_base, > LLVMConstInt(ctx->i32, > tess_outer_index * 4, > 0), ""); > > for (i = 0; i < outer_comps; i++) { > outer[i] = out[i] = > - lds_load(bld_base, TGSI_TYPE_SIGNED, i, > lds_outer); > + lds_load(bld_base, ctx->ac.i32, i, lds_outer); > } > for (i = 0; i < inner_comps; i++) { > inner[i] = out[outer_comps+i] = > - lds_load(bld_base, TGSI_TYPE_SIGNED, i, > lds_inner); > + lds_load(bld_base, ctx->ac.i32, i, lds_inner); > } > } > > if (shader->key.part.tcs.epilog.prim_mode == PIPE_PRIM_LINES) { > /* For isolines, the hardware expects tess factors in the > * reverse order from what GLSL / TGSI specify. > */ > LLVMValueRef tmp = out[0]; > out[0] = out[1]; > out[1] = tmp; > -- > 2.14.3 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev