Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com>
Cc: <mesa-sta...@lists.freedesktop.org>
---
This series has already been pushed upstream. Nanley and Ken has
taken a look at the patches. I'll send out a separate patch for
a small change suggested by them.
src/mesa/drivers/dri/i965/brw_pipe_control.c | 2 +-
src/mesa/drivers/dri/i965/intel_blit.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c
b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index bae4ba7c00..35f326a5c5 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -462,7 +462,7 @@ brw_emit_mi_flush(struct brw_context *brw)
if (brw->batch.ring == BLT_RING && devinfo->gen >= 6) {
BEGIN_BATCH_BLT(4);
- OUT_BATCH(MI_FLUSH_DW);
+ OUT_BATCH(MI_FLUSH_DW | (4 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c
b/src/mesa/drivers/dri/i965/intel_blit.c
index 13431a7bd2..3d7bc92d13 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -104,7 +104,7 @@ set_blitter_tiling(struct brw_context *brw,
assert(brw->screen->devinfo.gen >= 6);
/* Idle the blitter before we update how tiling is interpreted. */
- OUT_BATCH(MI_FLUSH_DW);
+ OUT_BATCH(MI_FLUSH_DW | (4 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
--
2.13.5
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
