---
src/amd/common/ac_nir_to_llvm.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 1ecdeca063..a38db0c9b7 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -151,20 +151,42 @@ struct nir_to_llvm_context {
uint64_t tess_patch_outputs_written;
};
static inline struct nir_to_llvm_context *
nir_to_llvm_context_from_abi(struct ac_shader_abi *abi)
{
struct nir_to_llvm_context *ctx = NULL;
return container_of(abi, ctx, abi);
}
+static LLVMTypeRef
+nir2llvmtype(struct ac_nir_context *ctx,
+ const struct glsl_type *type)
+{
+ switch (glsl_get_base_type(glsl_without_array(type))) {
+ case GLSL_TYPE_UINT:
+ case GLSL_TYPE_INT:
+ return ctx->ac.i32;
+ case GLSL_TYPE_UINT64:
+ case GLSL_TYPE_INT64:
+ return ctx->ac.i64;
+ case GLSL_TYPE_DOUBLE:
+ return ctx->ac.f64;
+ case GLSL_TYPE_FLOAT:
+ return ctx->ac.f32;
+ default:
+ assert(!"Unsupported type in nir2llvmtype()");
+ break;
+ }
+ return 0;
+}
+
static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
const nir_deref_var *deref,
enum ac_descriptor_type desc_type,
const nir_tex_instr *instr,
bool image, bool write);
static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan)
{
return (index * 4) + chan;
}
--
2.14.3
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