This is what render target write does. Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com> --- src/intel/compiler/brw_disasm.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index da2a5d78dd..fbb18b0f26 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -1621,6 +1621,11 @@ brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo, brw_inst_sampler_msg_type(devinfo, inst), &space); err |= control(file, "sampler simd mode", gen5_sampler_simd_mode, brw_inst_sampler_simd_mode(devinfo, inst), &space); + if ((devinfo->gen >= 9 || devinfo->is_cherryview) && + brw_inst_data_format(devinfo, inst)) { + string(file, " HP"); + } + format(file, " Surface = %"PRIu64" Sampler = %"PRIu64, brw_inst_binding_table_index(devinfo, inst), brw_inst_sampler(devinfo, inst)); -- 2.11.0 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev