IMO this patch should be moved (when committing) as patch .. 6? So that we would have the dri enablers in place. Otherwise when if/bisecting these configs will fail to initialize.

On 29.11.2017 06:20, Mario Kleiner wrote:
Expose formats which are supported at least back to Gen 5 Ironlake,
possibly further. Allow creation of 10 bpc winsys buffers for drawables.

glxinfo now lists new RGBA 10 10 10 2/0 formats.
Works correctly under DRI2 without compositing.

v2: Move the BGRA/BGRX1010102 formats before the RGBA/RGBX8888
     32 bit formats, as the code comments require. Thanks Emil!
     Update num_formats from 3 to 5, to keep the special Android
     handling intact.

v3: Use num_formats = ARRAY_SIZE(formats) - 2 as suggested by Tapani,
     to only exclude the last 2 Android formats, add Tapani's r-b.

Signed-off-by: Mario Kleiner <mario.kleiner...@gmail.com>
Reviewed-by: Tapani Pälli <tapani.pa...@intel.com>
---
  src/mesa/drivers/dri/i965/intel_screen.c | 12 +++++++++++-
  1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
b/src/mesa/drivers/dri/i965/intel_screen.c
index b56a61b..39efc1c 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1646,7 +1646,13 @@ intelCreateBuffer(__DRIscreen *dri_screen,
        fb->Visual.samples = num_samples;
     }
- if (mesaVis->redBits == 5) {
+   if (mesaVis->redBits == 10 && mesaVis->alphaBits > 0) {
+      rgbFormat = mesaVis->redMask == 0x3ff00000 ? 
MESA_FORMAT_B10G10R10A2_UNORM
+                                                 : 
MESA_FORMAT_R10G10B10A2_UNORM;
+   } else if (mesaVis->redBits == 10) {
+      rgbFormat = mesaVis->redMask == 0x3ff00000 ? 
MESA_FORMAT_B10G10R10X2_UNORM
+                                                 : 
MESA_FORMAT_R10G10B10X2_UNORM;
+   } else if (mesaVis->redBits == 5) {
        rgbFormat = mesaVis->redMask == 0x1f ? MESA_FORMAT_R5G6B5_UNORM
                                             : MESA_FORMAT_B5G6R5_UNORM;
     } else if (mesaVis->sRGBCapable) {
@@ -2035,6 +2041,10 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
MESA_FORMAT_B8G8R8A8_SRGB, + /* For 10 bpc, 30 bit depth framebuffers. */
+      MESA_FORMAT_B10G10R10A2_UNORM,
+      MESA_FORMAT_B10G10R10X2_UNORM,
+
        /* The 32-bit RGBA format must not precede the 32-bit BGRA format.
         * Likewise for RGBX and BGRX.  Otherwise, the GLX client and the GLX
         * server may disagree on which format the GLXFBConfig represents,

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