The type can be a struct on RADV and causes an assert() to be
thrown, for radeonsi all structs should have been lowered away.
---
src/amd/common/ac_nir_to_llvm.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 4de8bd2f0cb..38a840bf813 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2989,25 +2989,28 @@ static LLVMValueRef visit_load_var(struct
ac_nir_context *ctx,
LLVMBuildBitCast(ctx->nctx->builder, result,
get_def_type(ctx, &instr->dest.ssa), "") :
result;
}
if (ctx->stage == MESA_SHADER_GEOMETRY) {
LLVMValueRef indir_index;
unsigned const_index, vertex_index;
get_deref_offset(ctx, instr->variables[0],
false, &vertex_index, NULL,
&const_index, &indir_index);
+
+ LLVMTypeRef type = ctx->nctx ? NULL :
+ nir2llvmtype(ctx,
instr->variables[0]->var->type);
+
return ctx->abi->load_inputs(ctx->abi,
instr->variables[0]->var->data.location,
instr->variables[0]->var->data.driver_location,
instr->variables[0]->var->data.location_frac, ve,
- vertex_index, const_index,
- nir2llvmtype(ctx,
instr->variables[0]->var->type));
+ vertex_index, const_index,
type);
}
for (unsigned chan = comp; chan < ve + comp; chan++) {
if (indir_index) {
unsigned count = glsl_count_attribute_slots(
instr->variables[0]->var->type,
ctx->stage ==
MESA_SHADER_VERTEX);
count -= chan / 4;
LLVMValueRef tmp_vec =
ac_build_gather_values_extended(
&ctx->ac, ctx->abi->inputs +
idx + chan, count,
--
2.14.3
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