On 12/14/2017 08:35 PM, Bas Nieuwenhuizen wrote:
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> Would it make sense to move the compute_resource_limits calculation to pipeline creation time?
Yeah, possibly.
On Thu, Dec 14, 2017 at 3:51 PM, Samuel Pitoiset <samuel.pitoi...@gmail.com> wrote:Ported from RadeonSI. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> --- src/amd/vulkan/radv_cmd_buffer.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index d6aaff707b..4a048485c8 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2561,6 +2561,7 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer) { struct radv_shader_variant *compute_shader; struct radv_pipeline *pipeline = cmd_buffer->state.compute_pipeline; + struct radv_device *device = cmd_buffer->device; unsigned compute_resource_limits; unsigned waves_per_threadgroup; uint64_t va; @@ -2602,6 +2603,19 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer) compute_resource_limits = S_00B854_SIMD_DEST_CNTL(waves_per_threadgroup % 4 == 0); + if (device->physical_device->rad_info.chip_class >= CIK) { + unsigned num_cu_per_se = + device->physical_device->rad_info.num_good_compute_units / + device->physical_device->rad_info.max_se; + + /* Force even distribution on all SIMDs in CU if the workgroup + * size is 64. This has shown some good improvements if # of + * CUs per SE is not a multiple of 4. + */ + if (num_cu_per_se % 4 && waves_per_threadgroup == 1) + compute_resource_limits |= S_00B854_FORCE_SIMD_DIST(1); + } + radeon_set_sh_reg(cmd_buffer->cs, R_00B854_COMPUTE_RESOURCE_LIMITS, compute_resource_limits); -- 2.15.1 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
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