[Mesa-dev] [PATCH] [rfc] radv: load depth clear regs for tc compatible depth images.

[Dave Airlie]

From: Dave Airlie <airl...@redhat.com>

If we are using tc compatible depth image as textures, it seems
that we would need to make sure the depth/stencil clear registers
are reloaded with the correct values before accessing the image.

This was a failed attempt to fix
dEQP-VK.renderpass.suballocation.formats.d32_sfloat_s8_uint.load.clear
---
 src/amd/vulkan/radv_cmd_buffer.c     | 2 +-
 src/amd/vulkan/radv_descriptor_set.c | 4 ++++
 src/amd/vulkan/radv_private.h        | 2 ++
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 6a89d4e..c24fef0 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1330,7 +1330,7 @@ radv_set_depth_clear_regs(struct radv_cmd_buffer 
*cmd_buffer,
                radeon_emit(cmd_buffer->cs, fui(ds_clear_value.depth)); /* 
R_02802C_DB_DEPTH_CLEAR */
 }
 
-static void
+void
 radv_load_depth_clear_regs(struct radv_cmd_buffer *cmd_buffer,
                           struct radv_image *image)
 {
diff --git a/src/amd/vulkan/radv_descriptor_set.c 
b/src/amd/vulkan/radv_descriptor_set.c
index e815939..3bede6d 100644
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -642,6 +642,10 @@ write_image_descriptor(struct radv_device *device,
 
        memcpy(dst, descriptor, 16 * 4);
 
+       if (radv_htile_enabled(iview->image, iview->base_mip)) {
+               radv_load_depth_clear_regs(cmd_buffer,iview->image);
+       }
+
        if (cmd_buffer)
                radv_cs_add_buffer(device->ws, cmd_buffer->cs, iview->bo, 7);
        else
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index acc4ed4..596bfc9 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1608,6 +1608,8 @@ void radv_meta_push_descriptor_set(struct radv_cmd_buffer 
*cmd_buffer,
                                    uint32_t descriptorWriteCount,
                                    const VkWriteDescriptorSet 
*pDescriptorWrites);
 
+void radv_load_depth_clear_regs(struct radv_cmd_buffer *cmd_buffer,
+                               struct radv_image *image);
 void radv_initialise_cmask(struct radv_cmd_buffer *cmd_buffer,
                           struct radv_image *image, uint32_t value);
 void radv_initialize_dcc(struct radv_cmd_buffer *cmd_buffer,
-- 
2.9.5

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