Reviewed-by: Marek Olšák <marek.ol...@amd.com>

Marek

On Thu, Jan 4, 2018 at 4:24 PM, Samuel Pitoiset
<samuel.pitoi...@gmail.com> wrote:
> This might decrease VGPR spilling, because we no longer
> have to use v4i32 for 2D fetches when level == 0. We now
> use v2i32 for those cases.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
> ---
>  src/amd/common/ac_nir_to_llvm.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index 864f58b56d..7d8aa6ec49 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -2277,7 +2277,9 @@ static LLVMValueRef build_tex_intrinsic(struct 
> ac_nir_context *ctx,
>         case nir_texop_txf:
>         case nir_texop_txf_ms:
>         case nir_texop_samples_identical:
> -               args->opcode = instr->sampler_dim == GLSL_SAMPLER_DIM_MS ? 
> ac_image_load : ac_image_load_mip;
> +               args->opcode = lod_is_zero ||
> +                              instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
> +                                       ac_image_load : ac_image_load_mip;
>                 args->compare = false;
>                 args->offset = false;
>                 break;
> --
> 2.15.1
>
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