On Tuesday, February 13, 2018 11:15:13 AM PST Anuj Phogat wrote:
> SIMD4x2 dispatch mode has been removed in GEN11. We're not using
> it anyways in Mesa. Adding few asserts to make it explicit.
> 
> Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com>
> ---
>  src/intel/blorp/blorp_genX_exec.h             | 4 ++++
>  src/mesa/drivers/dri/i965/genX_state_upload.c | 5 +++++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/src/intel/blorp/blorp_genX_exec.h 
> b/src/intel/blorp/blorp_genX_exec.h
> index 85cd74f915..aa2baf6c6f 100644
> --- a/src/intel/blorp/blorp_genX_exec.h
> +++ b/src/intel/blorp/blorp_genX_exec.h
> @@ -572,6 +572,10 @@ blorp_emit_vs_config(struct blorp_batch *batch,
>                       const struct blorp_params *params)
>  {
>     struct brw_vs_prog_data *vs_prog_data = params->vs_prog_data;
> +#if GEN_GEN >= 11
> +   assert(!vs_prog_data ||
> +          vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8);
> +#endif

   assert(!vs_prog_data || GEN_GEN < 11 ||
          vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8);

(no need for #if..#endif)

>     blorp_emit(batch, GENX(3DSTATE_VS), vs) {
>        if (vs_prog_data) {
> diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c 
> b/src/mesa/drivers/dri/i965/genX_state_upload.c
> index fa7dded8df..8f28052505 100644
> --- a/src/mesa/drivers/dri/i965/genX_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
> @@ -2044,6 +2044,8 @@ genX(upload_vs_state)(struct brw_context *brw)
>  
>     assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ||
>            vue_prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT);
> +   assert(devinfo->gen < 11 ||
> +          vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8);
>  
>  #if GEN_GEN == 6
>     /* From the BSpec, 3D Pipeline > Geometry > Vertex Shader > State,
> @@ -3961,6 +3963,9 @@ genX(upload_ds_state)(struct brw_context *brw)
>     if (!tes_prog_data) {
>        brw_batch_emit(brw, GENX(3DSTATE_DS), ds);
>     } else {
> +      assert(devinfo->gen < 11 ||
> +             vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8);
> +

   assert(GEN_GEN < 11 || ...)

(no need for run-time devinfo access)

With those changed,
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>

>        brw_batch_emit(brw, GENX(3DSTATE_DS), ds) {
>           INIT_THREAD_DISPATCH_FIELDS(ds, Patch);
>  
> 

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