Kenneth Graunke <[email protected]> writes: > By default, 3DSTATE_CONSTANT_* Constant Buffer 0 is relative to dynamic > state base address. This makes it unusable for pushing UBOs. > > There is a bit in the INSTPM register (or CS_DEBUG_MODE2 on Skylake) > which controls whether buffer 0 is relative to dynamic state base > address, or simply a normal pointer. Setting that gives us full > flexibility. This lets us push up to 4 UBO ranges. > > We can't currently write this on Haswell and earlier, and will need > to update the kernel command parser, and then do the whole version > checking song and dance. We also need a brand new kernel that supports > context isolation - on older kernels, newly created contexts inherit > register state from whatever happened to be running. So, setting this > would have catastrophic impact on other drivers such as libva, Beignet, > or older Mesa. > > See commit 8ec5a4e4a4a32f4de351c5fc2bf0eb615b6eef1b where we did this > once before, but had to revert it in commit 013d33122028f2492da90a03a.
Reviewed-by: Francisco Jerez <[email protected]> > --- > src/mesa/drivers/dri/i965/brw_state_upload.c | 24 ++++++++++++++++++++++++ > src/mesa/drivers/dri/i965/intel_screen.c | 9 ++++++++- > 2 files changed, 32 insertions(+), 1 deletion(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c > b/src/mesa/drivers/dri/i965/brw_state_upload.c > index 86c12e4d357..d8273aa5734 100644 > --- a/src/mesa/drivers/dri/i965/brw_state_upload.c > +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c > @@ -49,6 +49,7 @@ static void > brw_upload_initial_gpu_state(struct brw_context *brw) > { > const struct gen_device_info *devinfo = &brw->screen->devinfo; > + const struct brw_compiler *compiler = brw->screen->compiler; > > /* On platforms with hardware contexts, we can set our initial GPU state > * right away rather than doing it via state atoms. This saves a small > @@ -115,6 +116,29 @@ brw_upload_initial_gpu_state(struct brw_context *brw) > OUT_BATCH(0); > ADVANCE_BATCH(); > } > + > + /* Set the "CONSTANT_BUFFER Address Offset Disable" bit, so > + * 3DSTATE_CONSTANT_XS buffer 0 is an absolute address. > + * > + * This is only safe on kernels with context isolation support. > + */ > + if (!compiler->constant_buffer_0_is_relative) { > + if (devinfo->gen >= 9) { > + BEGIN_BATCH(3); > + OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); > + OUT_BATCH(CS_DEBUG_MODE2); > + OUT_BATCH(REG_MASK(CSDBG2_CONSTANT_BUFFER_ADDRESS_OFFSET_DISABLE) | > + CSDBG2_CONSTANT_BUFFER_ADDRESS_OFFSET_DISABLE); > + ADVANCE_BATCH(); > + } else if (devinfo->gen == 8) { > + BEGIN_BATCH(3); > + OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); > + OUT_BATCH(INSTPM); > + OUT_BATCH(REG_MASK(INSTPM_CONSTANT_BUFFER_ADDRESS_OFFSET_DISABLE) | > + INSTPM_CONSTANT_BUFFER_ADDRESS_OFFSET_DISABLE); > + ADVANCE_BATCH(); > + } > + } > } > > static inline const struct brw_tracked_state * > diff --git a/src/mesa/drivers/dri/i965/intel_screen.c > b/src/mesa/drivers/dri/i965/intel_screen.c > index d275b28a4b9..4b62c5f66cb 100644 > --- a/src/mesa/drivers/dri/i965/intel_screen.c > +++ b/src/mesa/drivers/dri/i965/intel_screen.c > @@ -2694,7 +2694,14 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) > screen->compiler = brw_compiler_create(screen, devinfo); > screen->compiler->shader_debug_log = shader_debug_log_mesa; > screen->compiler->shader_perf_log = shader_perf_log_mesa; > - screen->compiler->constant_buffer_0_is_relative = true; > + > + /* Changing the meaning of constant buffer pointers from a dynamic state > + * offset to an absolute address is only safe if the kernel isolates other > + * contexts from our changes. > + */ > + screen->compiler->constant_buffer_0_is_relative = devinfo->gen < 8 || > + !(screen->kernel_features & KERNEL_ALLOWS_CONTEXT_ISOLATION); > + > screen->compiler->supports_pull_constants = true; > > screen->has_exec_fence = > -- > 2.16.1 > > _______________________________________________ > mesa-dev mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
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