On Wed, Mar 21, 2018 at 2:39 AM, Eric Engestrom <[email protected]> wrote: > On Tuesday, 2018-03-20 13:39:25 -0700, Scott D Phillips wrote: >> When building intel_tiled_memcpy for i686, the stack will only be >> 4-byte aligned. This isn't sufficient for SSE temporaries which >> require 16-byte alignment. Use the force_align_arg_pointer >> function attribute in that case to ensure sufficient alignment. >> --- >> src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 8 +++++++- >> 1 file changed, 7 insertions(+), 1 deletion(-) >> >> diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c >> b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c >> index 69306828d72..bd8bafbd2d7 100644 >> --- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c >> +++ b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c >> @@ -42,6 +42,12 @@ >> #include <emmintrin.h> >> #endif >> >> +#if defined(__GNUC__) && defined(__i386__) && (defined(__SSSE3__) || >> defined(__SSE2__)) > > Is that a typo? s/SSSE3/SSE3/ ?
Nope, that's correct. SSSE3 is "Supplemental" SSE3, and we have compile-time code in this file that uses it over SSE2 to save a few instructions. _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
