Balance the miptree API by having a getter for depth clear values.
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 15 ---------------
src/mesa/drivers/dri/i965/gen6_depth_state.c | 4 ++--
src/mesa/drivers/dri/i965/gen7_misc_state.c | 3 +--
src/mesa/drivers/dri/i965/gen8_depth_state.c | 3 ++-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 19 +++++++++++++++++++
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 +++++
6 files changed, 29 insertions(+), 20 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c
b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 05517ebf587..27608d1d472 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -343,21 +343,6 @@ brw_emit_depthbuffer(struct brw_context *brw)
width, height, tile_x, tile_y);
}
-uint32_t
-brw_convert_depth_value(mesa_format format, float value)
-{
- switch (format) {
- case MESA_FORMAT_Z_FLOAT32:
- return float_as_int(value);
- case MESA_FORMAT_Z_UNORM16:
- return value * ((1u << 16) - 1);
- case MESA_FORMAT_Z24_UNORM_X8_UINT:
- return value * ((1u << 24) - 1);
- default:
- unreachable("Invalid depth format");
- }
-}
-
void
brw_emit_depth_stencil_hiz(struct brw_context *brw,
struct intel_mipmap_tree *depth_mt,
diff --git a/src/mesa/drivers/dri/i965/gen6_depth_state.c
b/src/mesa/drivers/dri/i965/gen6_depth_state.c
index 3a66b42fec1..3332a765dc1 100644
--- a/src/mesa/drivers/dri/i965/gen6_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_depth_state.c
@@ -212,8 +212,8 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
GEN5_DEPTH_CLEAR_VALID |
(2 - 2));
if (depth_mt) {
- OUT_BATCH(brw_convert_depth_value(depth_mt->format,
- depth_mt->fast_clear_color.f32[0]));
+ const struct gen_device_info *devinfo = &brw->screen->devinfo;
+ OUT_BATCH(intel_miptree_get_depth_clear_value(devinfo, depth_mt));
} else {
OUT_BATCH(0);
}
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c
b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index 58f0a1bdbfd..7091ecf02a5 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -176,8 +176,7 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
BEGIN_BATCH(3);
OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS << 16 | (3 - 2));
if (depth_mt) {
- OUT_BATCH(brw_convert_depth_value(depth_mt->format,
- depth_mt->fast_clear_color.f32[0]));
+ OUT_BATCH(intel_miptree_get_depth_clear_value(devinfo, depth_mt));
} else {
OUT_BATCH(0);
}
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c
b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index 27705d35df9..5679bced9ff 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -120,7 +120,8 @@ emit_depth_packets(struct brw_context *brw,
BEGIN_BATCH(3);
OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS << 16 | (3 - 2));
- OUT_BATCH(depth_mt ? depth_mt->fast_clear_color.u32[0] : 0);
+ OUT_BATCH(depth_mt ?
+ intel_miptree_get_depth_clear_value(devinfo, depth_mt) : 0);
OUT_BATCH(1);
ADVANCE_BATCH();
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 87c730452b5..dec2e614938 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -3825,3 +3825,22 @@ intel_miptree_get_clear_color(const struct
gen_device_info *devinfo,
return mt->fast_clear_color;
}
}
+
+uint32_t
+intel_miptree_get_depth_clear_value(const struct gen_device_info *devinfo,
+ const struct intel_mipmap_tree *mt)
+{
+ if (devinfo->gen >= 8)
+ return mt->fast_clear_color.u32[0];
+
+ switch (mt->format) {
+ case MESA_FORMAT_Z_FLOAT32:
+ return mt->fast_clear_color.u32[0];
+ case MESA_FORMAT_Z_UNORM16:
+ return mt->fast_clear_color.f32[0] * ((1u << 16) - 1);
+ case MESA_FORMAT_Z24_UNORM_X8_UINT:
+ return mt->fast_clear_color.f32[0] * ((1u << 24) - 1);
+ default:
+ unreachable("Invalid depth format");
+ }
+}
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index e66a2a8d384..edf9a619218 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -732,6 +732,11 @@ intel_miptree_set_depth_clear_value(struct brw_context
*brw,
struct intel_mipmap_tree *mt,
float clear_value);
+/* Get a clear value suitable for filling out an ISL depth state. */
+uint32_t
+intel_miptree_get_depth_clear_value(const struct gen_device_info *devinfo,
+ const struct intel_mipmap_tree *mt);
+
#ifdef __cplusplus
}
#endif
--
2.16.2
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