Hi Samuel, a question below

Den fre 6 apr. 2018 14:28Samuel Pitoiset <samuel.pitoi...@gmail.com> skrev:

> Simple extension that only returns information for AMD hw.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
> ---
>  src/amd/vulkan/radv_device.c      | 71
> +++++++++++++++++++++++++++++++++++++++
>  src/amd/vulkan/radv_extensions.py |  1 +
>  2 files changed, 72 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
> index 41f8242754..fba0b5c586 100644
> --- a/src/amd/vulkan/radv_device.c
> +++ b/src/amd/vulkan/radv_device.c
> @@ -888,6 +888,39 @@ void radv_GetPhysicalDeviceProperties(
>         memcpy(pProperties->pipelineCacheUUID, pdevice->cache_uuid,
> VK_UUID_SIZE);
>  }
>
> +static uint32_t
> +radv_get_max_cu_per_sh(struct radv_physical_device *device)
> +{
> +       /* This should be queried from the KMD, like the number of SEs. */
> +       switch (device->rad_info.family) {
>

Isn't Polaris missing from this switch?

BR
Nils

+       case CHIP_TAHITI:
> +               return 8;
> +       case CHIP_HAINAN:
> +               return 5;
> +       case CHIP_BONAIRE:
> +               return 7;
> +       case CHIP_HAWAII:
> +               return 11;
> +       case CHIP_ICELAND:
> +               return 6;
> +       case CHIP_CARRIZO:
> +               return 8;
> +       case CHIP_TONGA:
> +               return 8;
> +       case CHIP_FIJI:
> +               return 16;
> +       case CHIP_STONEY:
> +               return 3;
> +       case CHIP_VEGA10:
> +               return 16;
> +       case CHIP_RAVEN:
> +               return 11;
> +       default:
> +               fprintf(stderr, "Number of CUs per SH unknown!\n");
> +               return 0;
> +       }
> +}
> +
>  void radv_GetPhysicalDeviceProperties2(
>         VkPhysicalDevice                            physicalDevice,
>         VkPhysicalDeviceProperties2KHR             *pProperties)
> @@ -961,6 +994,44 @@ void radv_GetPhysicalDeviceProperties2(
>                         properties->filterMinmaxSingleComponentFormats =
> true;
>                         break;
>                 }
> +               case
> VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_CORE_PROPERTIES_AMD: {
> +                       VkPhysicalDeviceShaderCorePropertiesAMD
> *properties =
> +                               (VkPhysicalDeviceShaderCorePropertiesAMD
> *)ext;
> +
> +                       /* Shader engines. */
> +                       properties->shaderEngineCount =
> +                               pdevice->rad_info.max_se;
> +                       properties->shaderArraysPerEngineCount =
> +                               pdevice->rad_info.max_sh_per_se;
> +                       properties->computeUnitsPerShaderArray =
> +                               radv_get_max_cu_per_sh(pdevice);
> +                       properties->simdPerComputeUnit = 4;
> +                       properties->wavefrontsPerSimd =
> +                               pdevice->rad_info.family == CHIP_TONGA ||
> +                               pdevice->rad_info.family == CHIP_ICELAND ||
> +                               pdevice->rad_info.family == CHIP_POLARIS10
> ||
> +                               pdevice->rad_info.family == CHIP_POLARIS11
> ||
> +                               pdevice->rad_info.family == CHIP_POLARIS12
> ? 8 : 10;
> +                       properties->wavefrontSize = 64;
> +
> +                       /* SGPR. */
> +                       properties->sgprsPerSimd =
> +                               radv_get_num_physical_sgprs(pdevice);
> +                       properties->minSgprAllocation =
> +                               pdevice->rad_info.chip_class >= VI ? 16 :
> 8;
> +                       properties->maxSgprAllocation =
> +                               pdevice->rad_info.family == CHIP_TONGA ||
> +                               pdevice->rad_info.family == CHIP_ICELAND ?
> 96 : 104;
> +                       properties->sgprAllocationGranularity =
> +                               pdevice->rad_info.chip_class >= VI ? 16 :
> 8;
> +
> +                       /* VGPR. */
> +                       properties->vgprsPerSimd = RADV_NUM_PHYSICAL_VGPRS;
> +                       properties->minVgprAllocation = 4;
> +                       properties->maxVgprAllocation = 256;
> +                       properties->vgprAllocationGranularity = 4;
> +                       break;
> +               }
>                 default:
>                         break;
>                 }
> diff --git a/src/amd/vulkan/radv_extensions.py
> b/src/amd/vulkan/radv_extensions.py
> index bc63a34896..a25db637e2 100644
> --- a/src/amd/vulkan/radv_extensions.py
> +++ b/src/amd/vulkan/radv_extensions.py
> @@ -96,6 +96,7 @@ EXTENSIONS = [
>      Extension('VK_AMD_draw_indirect_count',               1, True),
>      Extension('VK_AMD_gcn_shader',                        1, True),
>      Extension('VK_AMD_rasterization_order',               1,
> 'device->has_out_of_order_rast'),
> +    Extension('VK_AMD_shader_core_properties',            1, True),
>      Extension('VK_AMD_shader_info',                       1, True),
>      Extension('VK_AMD_shader_trinary_minmax',             1, True),
>  ]
> --
> 2.16.3
>
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